bae9f85ddb
This commit adds support for describing USB ports in devicetree.cb. It allows a USB port location to be described in the tree with configuration information, and ACPI code to be generated that provides this information to the OS. A new scan_usb_bus() is added that will scan bridges for devices so a tree of ports and hubs can be created. The device address is computed with a 'port type' and a 'port id' which is flexible for SOC to handle depending on their specific USB setup and allows USB2 and USB3 ports to be described separately. For example a board may have devices on two ports, one with a USB2 device and one with a USB3 device, both of which are connected to an xHCI controller with a root hub: xHCI | RootHub | | USB2[0] USB3[2] device pci 14.0 on chip drivers/usb/acpi register "name" = ""Root Hub"" device usb 0.0 on chip drivers/usb/acpi register "name" = ""USB 2.0 Port 0"" device usb 2.0 on end end chip drivers/usb/acpi register "name" = ""USB 3.0 Port 2"" device usb 3.2 on end end end end end Change-Id: I64e6eba503cdab49be393465b535e139a8c90ef4 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/26169 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> |
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.. | ||
dram | ||
azalia.h | ||
azalia_device.h | ||
cardbus.h | ||
device.h | ||
drm_dp_helper.h | ||
early_smbus.h | ||
hypertransport.h | ||
hypertransport_def.h | ||
i2c.h | ||
i2c_bus.h | ||
i2c_simple.h | ||
path.h | ||
pci.h | ||
pci_def.h | ||
pci_ehci.h | ||
pci_ids.h | ||
pci_ops.h | ||
pci_rom.h | ||
pciexp.h | ||
pcix.h | ||
pnp.h | ||
pnp_def.h | ||
resource.h | ||
smbus.h | ||
smbus_def.h | ||
spi.h |