coreboot-kgpe-d16/src
Xiang Wang 411a8b7a66 src/mb/sifive/hifive-unleashed: replace fdt in maskrom
The fdt in the maskrom cannot be used to start linux. The correct fdt
is dumped by replacing the bbl of the original firmware and used in
coreboot.

Correct the mac address in fdt by reading otp

Change-Id: Ic29f0e590311360b85fafd12ebc36cd189fbbc38
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/c/31047
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Philipp Hug <philipp@hug.cx>
2019-02-28 17:10:01 +00:00
..
acpi
arch ACPI: Fill asl_compiler_revision field left empty 2019-02-26 17:53:31 +00:00
commonlib commonlib: Add Bubble sort algorithm 2019-02-26 11:14:41 +00:00
console console: Split loglevel for fast and slow 2019-02-27 11:10:00 +00:00
cpu cpu/x86/mtrr/mtrr.c:Avoid static scan false positive 2019-02-28 13:57:07 +00:00
device src/device/Kconfig: Change default VESA mode from 117h to 118h 2019-02-25 11:21:19 +00:00
drivers drivers/intel/fsp2_0: Update dependency of USE_FSP_REPO 2019-02-23 14:25:31 +00:00
ec ec/google/chromeec: fix the error status passing 2019-02-27 11:08:18 +00:00
include soc/intel/cannonlake: Add Comet Lake U SA 2+2 Device ID 2019-02-28 02:22:11 +00:00
lib rtc: Fix rtc_calc_weekday 2019-02-27 11:07:11 +00:00
mainboard src/mb/sifive/hifive-unleashed: replace fdt in maskrom 2019-02-28 17:10:01 +00:00
northbridge nb/intel/nehalem: Remove CAR_GLOBAL use 2019-02-12 22:16:42 +00:00
security console: Refactor printk() varargs prototypes 2019-02-27 11:09:31 +00:00
soc src/soc/intel/braswell/northcluster.c: Correct calculation of FSP memory area 2019-02-28 17:09:29 +00:00
southbridge intel/spi: Switch to native PCI config accessors 2019-02-28 10:34:43 +00:00
superio superio/nsc/pc87417: Use common early_serial 2019-02-14 07:54:55 +00:00
vendorcode vendorcode/intel/fsp/fsp2_0/cml: Add FSP header files for Cometlake 2019-02-28 13:33:40 +00:00
Kconfig Kconfig: Add system type entries for common enclosures 2019-02-05 16:03:29 +00:00