137 lines
4.8 KiB
Markdown
137 lines
4.8 KiB
Markdown
# ASRock H110M-DVS
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This page describes how to run coreboot on the [ASRock H110M-DVS].
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## Required proprietary blobs
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Mainboard is based on Intel Skylake/Kaby Lake processor and H110 Chipset.
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Intel company provides [Firmware Support Package (2.0)](../../soc/intel/fsp/index.md)
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(intel FSP 2.0) to initialize this generation silicon. Please see this
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[document](../../soc/intel/code_development_model/code_development_model.md).
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FSP Information:
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```eval_rst
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+-----------------------------+-------------------+-------------------+
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| FSP Project Name | Directory | Specification |
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+-----------------------------+-------------------+-------------------+
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| 7th Generation Intel® Core™ | KabylakeFspBinPkg | 2.0 |
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| processors and chipsets | | |
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| (formerly Kaby Lake) | | |
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+-----------------------------+-------------------+-------------------+
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```
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## Building coreboot
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The following steps set the default parameters for this board to build a
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fully working image:
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```bash
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make distclean
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touch .config
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./util/scripts/config --enable VENDOR_ASROCK
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./util/scripts/config --enable BOARD_ASROCK_H110M_DVS
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./util/scripts/config --enable CONFIG_ADD_FSP_BINARIES
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./util/scripts/config --enable CONFIG_FSP_USE_REPO
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./util/scripts/config --set-str REALTEK_8168_MACADDRESS "xx:xx:xx:xx:xx:xx"
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make olddefconfig
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```
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However, it is strongly advised to use `make menuconfig` afterwards
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(or instead), so that you can see all of the settings.
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Use the following command to disable the serial console if debugging
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output is not required:
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```bash
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./util/scripts/config --disable CONSOLE_SERIAL
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```
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However, a more flexible method is to change the console log level from
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within an OS using `util/nvramtool`, or with the `nvramcui` payload.
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Now, run `make` to build the coreboot image.
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## Flashing coreboot
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### Internal programming
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The main SPI flash can be accessed using [flashrom]. By default, only
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the BIOS region of the flash is writable. If you wish to change any
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other region, such as the Management Engine or firmware descriptor, then
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an external programmer is required (unless you find a clever way around
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the flash protection). More information about this [here](../../flash_tutorial/index.md).
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### External programming
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The flash chip is a 8 MiB socketed DIP-8 chip. Specifically, it's a
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Macronix MX25L6473E, whose datasheet can be found [here][MX25L6473E].
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The chip is located to the bottom right-hand side of the board. For
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a precise location, refer to section 1.3 (Motherboard Layout) of the
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[H110M-DVS manual], where the chip is labelled "64Mb BIOS". Take note of
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the chip's orientation, remove it from its socket, and flash it with
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an external programmer. For reference, the notch in the chip should be
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facing towards the bottom of the board.
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## Known issues
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- The VGA port doesn't work. Discrete graphic card is used as primary
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device for display output (if CONFIG_ONBOARD_VGA_IS_PRIMARY is not
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set). Dynamic switching between iGPU and PEG is not yet supported.
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- SuperIO GPIO pin is used to reset Realtek chip. However, since the
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Logical Device 7 (GPIO6, GPIO7, GPIO8) is not initialized, the network
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chip is in a reset state all the time.
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## Untested
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- parallel port
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- PS/2 keyboard
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- PS/2 mouse
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- EHCI debug
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- TPM
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- infrared module
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- chassis intrusion header
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- chassis speaker header
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## Working
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- integrated graphics init with libgfxinit (see [Known issues](#known-issues))
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- PCIe x1
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- PEG x16 Gen3
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- SATA
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- USB
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- serial port
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- onboard audio
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- using `me_cleaner`
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- using `flashrom`
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## TODO
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- NCT6791D GPIOs
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- onboard network (see [Known issues](#known-issues))
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- S3 suspend/resume
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- Wake-on-LAN
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- hardware monitor
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## Technology
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```eval_rst
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+------------------+--------------------------------------------------+
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| CPU | Intel Skylake/Kaby Lake (LGA1151) |
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+------------------+--------------------------------------------------+
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| PCH | Intel Sunrise Point H110 |
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+------------------+--------------------------------------------------+
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| Super I/O | Nuvoton NCT6791D |
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+------------------+--------------------------------------------------+
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| EC | None |
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+------------------+--------------------------------------------------+
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| Coprocessor | Intel Management Engine |
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+------------------+--------------------------------------------------+
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```
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[ASRock H110M-DVS]: https://www.asrock.com/mb/Intel/H110M-DVS%20R2.0/
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[MX25L6473E]: http://www.macronix.com/Lists/Datasheet/Attachments/7380/MX25L6473E,%203V,%2064Mb,%20v1.4.pdf
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[flashrom]: https://flashrom.org/Flashrom
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[H110M-DVS manual]: http://asrock.pc.cdn.bitgravity.com/Manual/H110M-DVS%20R2.0.pdf
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