405f229689
UART pad configuration should not be done in common code, because that may cause short circuits, when the user sets a wrong UART index. Since all boards do pad setup on their own now, finally drop the pad configuration from SoC common code. Change-Id: Id03719eb8bd0414083148471ed05dea62a895126 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48829 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lance Zhao
18 lines
385 B
C
18 lines
385 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* This file is created based on Intel Alder Lake Processor PCH Datasheet
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* Document number: 621483
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* Chapter number: 9
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*/
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#include <commonlib/helpers.h>
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#include <soc/pci_devs.h>
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const unsigned int uart_devices[] = {
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PCH_DEVFN_UART0,
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PCH_DEVFN_UART1,
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PCH_DEVFN_UART2,
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};
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const int uart_devices_size = ARRAY_SIZE(uart_devices);
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