coreboot-kgpe-d16/src/soc/amd
Felix Held 42b0e8f438 soc/amd/picasso/soc_util: rework reduced I/O chip detection
Both Dali and Pollock chips have less PCIe, USB3 and DisplayPort
connectivity. While Dali can either be fused-down PCO or RV2 silicon,
Pollock is always RV2 silicon.

Since we have all boards using this code in tree right now,
soc_is_dali() can be renamed and generalized to soc_is_reduced_io_sku().

Change-Id: I9eb57595da6f806305552128b0c077ceeb7c4661
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42833
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-28 14:16:36 +00:00
..
common Revert "soc/amd/common/block/acpimmio: Update acpimmio for psp_verstage" 2020-06-25 19:02:24 +00:00
picasso soc/amd/picasso/soc_util: rework reduced I/O chip detection 2020-06-28 14:16:36 +00:00
stoneyridge src: Report byte-sized access for GPE0 2020-06-24 11:50:50 +00:00
Kconfig soc/amd: Add picasso to Kconfig 2019-07-02 14:33:42 +00:00