Angel Pons 430f1c5764 soc/intel/broadwell: Align raminit-related code with Haswell ... Use Haswell MCHBAR register names and align cosmetics of functions. Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical. Change-Id: Ie8f369a704b833da86c2eb5864dffe2e8c4bb466 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46364 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-10-23 20:28:28 +00:00
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alderlake	soc/intel: convert XTAL frequency constant to Kconfig	2020-10-21 07:14:00 +00:00
apollolake	{cpu,soc}/intel: replace AES-NI locking by common implemenation call	2020-10-21 12:34:28 +00:00
baytrail	src: Rename EM100Pro-specific SPI console Kconfig option	2020-10-13 08:40:52 +00:00
braswell	src: Rename EM100Pro-specific SPI console Kconfig option	2020-10-13 08:40:52 +00:00
broadwell	soc/intel/broadwell: Align raminit-related code with Haswell	2020-10-23 20:28:28 +00:00
cannonlake	soc/intel: convert XTAL frequency constant to Kconfig	2020-10-21 07:14:00 +00:00
common	soc/intel/common: Fix/clean up USB4 PCIe virtual/generic driver	2020-10-21 15:35:50 +00:00
denverton_ns	{cpu,soc}/intel: replace AES-NI locking by common implemenation call	2020-10-21 12:34:28 +00:00
elkhartlake	soc/intel: convert XTAL frequency constant to Kconfig	2020-10-21 07:14:00 +00:00
icelake	soc/intel: convert XTAL frequency constant to Kconfig	2020-10-21 07:14:00 +00:00
jasperlake	soc/intel: convert XTAL frequency constant to Kconfig	2020-10-21 07:14:00 +00:00
quark	arch/x86: Introduce ARCH_ALL_STAGES_X86_32	2020-09-26 11:42:28 +00:00
skylake	{cpu,soc}/intel: replace AES-NI locking by common implemenation call	2020-10-21 12:34:28 +00:00
tigerlake	soc/intel/tigerlake: Add Acoustic features	2020-10-23 20:25:49 +00:00
xeon_sp	soc/intel/xeon_sp/skx: Add missing includes	2020-10-23 00:49:58 +00:00
Kconfig	fsp2_0: Gather Kconfig declarations	2020-04-05 23:26:24 +00:00