coreboot-kgpe-d16/src/soc/intel
Bora Guvendik 43c3109696 soc/intel/skylake: Use ITSS common code
This patch uses common ITSS library to setup
itss irq.

Change-Id: Ibe65a92f1604277bec229c67f4375b6636c0972d
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/19244
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-28 16:32:20 +02:00
..
apollolake soc/intel/apollolake: Use ITSS common code 2017-04-28 16:30:57 +02:00
baytrail soc/intel: Unify timestamp.inc 2017-04-25 18:47:35 +02:00
braswell vboot: Select SoC-specific configuration for all Chrome OS boards 2017-03-28 22:12:54 +02:00
broadwell soc/intel: Unify timestamp.inc 2017-04-25 18:47:35 +02:00
common soc/intel/common/block: Add Intel common ITSS code support 2017-04-28 16:22:17 +02:00
fsp_baytrail lib: provide clearer devicetree semantics 2017-04-25 18:14:38 +02:00
fsp_broadwell_de fsp_broadwell_de: Add SMM code 2017-04-28 06:19:20 +02:00
quark soc/intel/quark: Move include of reg_access.h 2017-04-19 20:54:06 +02:00
sch nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h> 2017-01-06 18:15:03 +01:00
skylake soc/intel/skylake: Use ITSS common code 2017-04-28 16:32:20 +02:00