Nico Huber d23ee5de22 mainboard: Clean up boot_option/reboot_bits in cmos.layout ... Since commit 3bfd7cc (drivers/pc80: Rework normal / fallback selector code) the reboot counter stored in `reboot_bits` isn't reset on a reboot with `boot_option = 1` any more. Hence, with SKIP_MAX_REBOOT_CNT_CLEAR enabled, later stages (e.g. payload, OS) have to clear the counter too, when they want to switch to normal boot. So change the bits to (h)ex instead of (r)eserved. To clarify their meaning, rename `reboot_bits` to `reboot_counter`. Also remove all occurences of the obsolete `last_boot` bit that have sneaked in again since 24391321 (mainboard: Remove last_boot NVRAM option). Change-Id: Ib3fc38115ce951b75374e0d1347798b23db7243c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/16157 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com> Reviewed-by: York Yang <york.yang@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>		2016-08-17 00:27:42 +02:00
..
acpi	Remove extra newlines from the end of all coreboot files.	2016-07-31 18:19:33 +02:00
spd	mb/google: remove superfluous header includes in bdw chromeboxes	2016-06-21 00:44:58 +02:00
acpi_tables.c
board_info.txt
chromeos.c	chromeos mainboards: remove chromeos.asl	2016-07-30 01:36:32 +02:00
chromeos.fmd	chromeos.fmd: Mark RW_LEGACY as CBFS	2016-04-05 13:37:31 +02:00
cmos.layout	mainboard: Clean up boot_option/reboot_bits in cmos.layout	2016-08-17 00:27:42 +02:00
devicetree.cb	mb/google: Remove whitespace from devicetree on bdw boxes.	2016-06-16 06:46:13 +02:00
dsdt.asl	chromeos mainboards: remove chromeos.asl	2016-07-30 01:36:32 +02:00
fadt.c
gpio.h
hda_verb.c
Kconfig	vboot: Separate vboot from chromeos	2016-07-28 00:36:00 +02:00
Kconfig.name
lan.c
mainboard.c	Remove extra newlines from the end of all coreboot files.	2016-07-31 18:19:33 +02:00
Makefile.inc
onboard.h
pei_data.c
romstage.c
smihandler.c	mainboards: align on using ACPI_Sx definitions	2016-07-15 08:30:31 +02:00
thermal.h