ed0c83877f
This adds S3 Suspend / Resume support to Intel's Bay Trail FSP It is based on the "src/soc/intel/baytrail/romstage/romstage.c" implementation. Change-Id: If0011068eb7290d1b764c5c4b12c17375fb69008 Signed-off-by: Mohan D'Costa <mohan@ndr.co.jp> Reviewed-on: http://review.coreboot.org/6937 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins) |
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cpu.asl | ||
device_nvs.asl | ||
globalnvs.asl | ||
gpio.asl | ||
irq_helper.h | ||
irqlinks.asl | ||
irqroute.asl | ||
lpc.asl | ||
lpe.asl | ||
lpss.asl | ||
platform.asl | ||
scc.asl | ||
sleepstates.asl | ||
southcluster.asl | ||
usb.asl | ||
xhci.asl |