Yu-Ping Wu 46009ea4cc soc/mediatek/mt8183: Force DRAM retraining if hotkey pressed ... Similar to MRC cache on x86 platforms, when a hotkey is pressed during boot, the calibration data cache saved in the flash will be cleared, consequently triggering DRAM retraining (full calibration) in the next boot. BRANCH=kukui BUG=b:139099592 TEST=emerge-kukui coreboot Change-Id: I2f9225f359e1fe5733e8e1c48b396aaeeb9a58ab Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36090 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>		2019-10-21 09:14:47 +00:00
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amd	soc/amd/picasso: Increase max APCB images to 5	2019-10-20 22:10:16 +00:00
cavium	devicetree: Fix improper use of chip_operations	2019-10-04 16:29:31 +00:00
imgtec	cpu,mb,soc: Init missing lb_serial struct fields	2019-09-19 09:28:10 +00:00
intel	Revert "soc/intel/cannonlake: Remove DMA support for PTT"	2019-10-21 09:08:03 +00:00
mediatek	soc/mediatek/mt8183: Force DRAM retraining if hotkey pressed	2019-10-21 09:14:47 +00:00
nvidia	cpu,mb,soc: Init missing lb_serial struct fields	2019-09-19 09:28:10 +00:00
qualcomm	sc7180: Provide initial SoC support	2019-10-21 09:06:55 +00:00
rockchip	arm64: Uprev Arm TF and adjust to BL31 parameter changes	2019-09-14 05:01:16 +00:00
samsung	cpu,mb,soc: Init missing lb_serial struct fields	2019-09-19 09:28:10 +00:00
sifive	soc/sifive/fu540: test and fix code of fu540 spi	2019-10-16 14:12:20 +00:00
ucb	lib: Rewrite qemu-armv7 ramdetect	2019-07-28 11:31:42 +00:00