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4793ef1f82
Revision Guide for AMD Family10h processors (#41322) rev 3.74 June 2010 with patch.erratum414 it stops here (next patches don't make it get further, but they're needed according to documentation, don't break anything for me and I still don't have a solution for booting, so I'm keeping them there in case they fix something. testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Done Loading stage image. Check CBFS header at fffffd2e magic is 4f524243 Found CBFS header at fffffd2e Check fallback/romstage CBFS: follow chain: fff00000 + 38 + 15b41 + align -> fff15b80 Check fallback/coreboot_ram Stage: loading fallback/coreboot_ram @ 0x200000 (1114112 bytes), entry @ 0x20000 Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5733 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 |
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------------------------------------------------------------------------------- coreboot README ------------------------------------------------------------------------------- coreboot is a Free Software project aimed at replacing the proprietary BIOS you can find in most of today's computers. It performs just a little bit of hardware initialization and then executes one of many possible payloads, e.g. a Linux kernel or a bootloader. Payloads -------- After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot. See http://www.coreboot.org/Payloads for a list of supported payloads. Supported Hardware ------------------ coreboot supports a wide range of chipsets, devices, and mainboards. For details please consult: * http://www.coreboot.org/Supported_Motherboards * http://www.coreboot.org/Supported_Chipsets_and_Devices Build Requirements ------------------ * gcc / g++ * make Optional: * doxygen (for generating/viewing documentation) * iasl (for targets with ACPI support) * gdb (for better debugging facilities on some targets) * ncurses (for 'make menuconfig') * flex and bison (for regenerating parsers) Building coreboot ----------------- Please consult http://www.coreboot.org/Build_HOWTO for details. Testing coreboot Without Modifying Your Hardware ------------------------------------------------- If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU. Please see http://www.coreboot.org/QEMU for details. Website and Mailing List ------------------------ Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website: http://www.coreboot.org You can contact us directly on the coreboot mailing list: http://www.coreboot.org/Mailinglist Copyright and License --------------------- The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details. coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details. This makes the resulting coreboot images licensed under the GPL, version 2.