coreboot-kgpe-d16/src
Felix Held 4836889249 soc/amd/picasso/psp: fix check of MSR_PSP_ADDR contents
If MSR_PSP_ADDR is uninitialized, it's all zeros and not all ones.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iecd3039f63f9d0cb75fe3cb37aee92ba65bbbb50
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50148
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-31 01:09:34 +00:00
..
acpi ACPI: Do minor improvements on GNVS 2021-01-29 10:21:25 +00:00
arch stage_cache: Add resume_from_stage_cache() 2021-01-29 10:53:33 +00:00
commonlib drivers/tpm: Implement full PPI 2020-12-21 02:38:20 +00:00
console lib/trace: Remove TRACE support 2020-12-02 23:35:58 +00:00
cpu cpu/intel/socket_LGA775: Align CAR DCACHE_RAM_BASE to SIZE 2021-01-28 12:34:52 +00:00
device device: Drop mmconf_resource_init function 2021-01-30 23:13:22 +00:00
drivers drivers/intel/fsp2_0: factor out and improve UPD signature check 2021-01-30 17:20:50 +00:00
ec ec/google/wilco: Convert to ASL 2.0 syntax 2021-01-24 21:51:39 +00:00
include device: Drop mmconf_resource_init function 2021-01-30 23:13:22 +00:00
lib stage_cache: Add resume_from_stage_cache() 2021-01-29 10:53:33 +00:00
mainboard mb/amd/majolica: Add an empty bootblock function to handle GPIO 2021-01-30 17:56:15 +00:00
northbridge nb/intel/i945: Define and use MMCONF_BUS_NUMBER 2021-01-30 23:13:05 +00:00
security soc/intel: Replace SA_PCIEX_LENGTH Kconfig options 2021-01-30 23:14:08 +00:00
soc soc/amd/picasso/psp: fix check of MSR_PSP_ADDR contents 2021-01-31 01:09:34 +00:00
southbridge sb/intel/ibexpeak: Drop invalid ME finalisation function 2021-01-30 23:25:02 +00:00
superio superio/nuvoton/common/Kconfig: Remove HWM config 2021-01-29 09:39:43 +00:00
vendorcode vc/google/chromeos/Kconfig: Remove unused NO_TPM_RESUME 2021-01-29 09:40:19 +00:00
Kconfig Kconfig: Show console debug options if loglevel override is set 2020-12-11 15:58:24 +00:00