Srinidhi N Kaushik 4af0adb443 soc/intel/tigerlake: Update SerialIoUart settings for Tiger Lake ... update SerialIoUartAutoFlow settings for Tiger Lake platform. BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Change-Id: I5ff2c63857a868ca4ed72c6d93bf518e085b8879 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39169 Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: caveh jalali <caveh@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-03-04 10:38:05 +00:00
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acpi	soc/intel/tigerlake: Add Jasper lake GPIO support	2020-03-03 10:09:26 +00:00
bootblock	soc/intel/common: Update Jasper Lake Device IDs	2020-02-25 10:13:36 +00:00
include/soc	soc/intel/tigerlake: Add Jasper lake GPIO support	2020-03-03 10:09:26 +00:00
romstage	soc/tigerlake: Correct FSP log interface	2020-03-02 23:43:12 +00:00
acpi.c	soc/intel/{apl,cnl,icl,skl,tgl}: Make above 4GB MMIO resource proper	2020-01-10 08:40:57 +00:00
chip.c	soc/intel/tigerlake: Update pci dev definition	2020-01-18 11:18:38 +00:00
chip.h	soc/intel/tigerlake: Add Jasper lake GPIO support	2020-03-03 10:09:26 +00:00
cpu.c	intel/smm: Provide common smm_relocation_params	2019-11-22 06:37:50 +00:00
elog.c	soc/intel/tigerlake: Do initial SoC commit till ramstage	2019-11-09 03:26:34 +00:00
espi.c	soc/intel/tigerlake: Update PMC Register Base and platform check for JSP	2020-02-15 04:09:21 +00:00
finalize.c	soc/intel/{cnl,icl,skl, tgl}: Move SOC_INTEL_COMMON_BLOCK_THERMAL into SoC specific Kconfig	2020-01-16 16:28:09 +00:00
fsp_params_jsl.c	soc/intel/tigerlake: Update FSP params for Jasper Lake	2020-02-27 12:03:42 +00:00
fsp_params_tgl.c	soc/intel/tigerlake: Update SerialIoUart settings for Tiger Lake	2020-03-04 10:38:05 +00:00
gpio_jsl.c	soc/intel/tigerlake: Add Jasper lake GPIO support	2020-03-03 10:09:26 +00:00
gpio_tgl.c	soc/intel/tigerlake: Add Jasper lake GPIO support	2020-03-03 10:09:26 +00:00
graphics.c	soc/intel/tigerlake: Do initial SoC commit till ramstage	2019-11-09 03:26:34 +00:00
gspi.c	soc/intel/tigerlake: Do initial SoC commit till ramstage	2019-11-09 03:26:34 +00:00
i2c.c	soc/intel/tigerlake: Do initial SoC commit till ramstage	2019-11-09 03:26:34 +00:00
Kconfig	soc/intel/{icl,jsl,tgl}: Enable PlatformDebugConsent by Kconfig	2020-03-01 07:21:41 +00:00
lockdown.c	soc/intel/tigerlake: Do initial SoC commit till ramstage	2019-11-09 03:26:34 +00:00
Makefile.inc	soc/intel/tigerlake: Add Jasper lake GPIO support	2020-03-03 10:09:26 +00:00
meminit_jsl.c	src/soc/tigerlake: Add memory configuration support for Jasper Lake	2020-03-03 04:07:39 +00:00
meminit_tgl.c	soc/intel/tigerlake: add memory configuration support	2020-02-09 19:26:36 +00:00
p2sb.c	soc/intel/tigerlake: Do initial SoC commit till ramstage	2019-11-09 03:26:34 +00:00
pmc.c	soc/intel/tigerlake: Do initial SoC commit till ramstage	2019-11-09 03:26:34 +00:00
pmutil.c	soc/intel: Add get_pmbase	2020-02-04 18:54:01 +00:00
reset.c	soc/intel/{cnl,icl,skl,tgl,common}: Make changes to send_heci_reset_req_message()	2020-02-09 19:20:44 +00:00
sd.c	soc/intel/tigerlake: Do initial SoC commit till ramstage	2019-11-09 03:26:34 +00:00
smihandler.c	soc/intel/common/block: Move cse common functions into block/cse	2020-02-25 10:13:08 +00:00
smmrelocate.c	src: Use '#include <smp/node.h>' when appropriate	2019-12-19 05:23:25 +00:00
spi.c	soc/intel/tigerlake: Do initial SoC commit till ramstage	2019-11-09 03:26:34 +00:00
systemagent.c	soc/intel/tigerlake: Do initial SoC commit till ramstage	2019-11-09 03:26:34 +00:00
uart.c	soc/intel/tigerlake: Do initial SoC commit till ramstage	2019-11-09 03:26:34 +00:00