Chris Wang 4c4a360018 soc/amd/picasso: clean up and re-sort UPD table ... Clean up the unused UPD and re-sort the table, and also update the new phy parameter in the soc code and overridetree. remove: EDpPhySel EDpVersion rename: DpPhyOverride -> edp_phy_override EDpPhySel -> edp_physel DpVsPemphLevel -> edp_dp_vs_pemph_level MarginDeemPh -> edp_margin_deemph Deemph6db4 -> edp_deemph_6db_4 BoostAdj -> edp_boost_adj eDP phy setting: DP_VS_LEVEL0_PREEMPH_LEVEL0 = 0x00(0.4v 0db swing 0,pre-emphasis 0) COMMON_MAR_DEEMPH_NOM = 0x004b COMMON_SELDEEMPH60 = 0x0 CMD_BUS_GLOBAL_FOR_TX_LANE0 = 0x80 BUG=b:171269338 BRANCH=zork TEST=Build, verify the parameter pass to picasso-fsp Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com> Change-Id: I655af08e2f86398d088e30d330f49e71cf7e1275 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50212 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>		2021-02-03 17:27:30 +00:00
..
agesa	src: Remove redundant use of ACPI offset(0)	2020-12-03 00:05:52 +00:00
cimx	vendorcode/amd: Fix typo in *is defined* in comments	2020-10-17 13:54:11 +00:00
fsp	soc/amd/picasso: clean up and re-sort UPD table	2021-02-03 17:27:30 +00:00
include	treewide: Remove "this file is part of" lines	2020-05-11 17:11:40 +00:00
pi	sb/amd/pi/hudson: Enable use of common GPIO API	2020-12-28 13:37:15 +00:00
Kconfig	vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support XMP memory profiles	2020-12-02 17:05:39 +00:00
Makefile.inc