coreboot-kgpe-d16/payloads/libpayload/arch/mips
Vadim Bendebury 801aa7c355 libpayload: fix a mips memmove() bug
size_t is an unsigned type and as such is a bad choice for a counting
down loop counter.

BRANCH=all
BUG=none
TEST=editing cli command line does not cause hangs any more

Change-Id: I0502553b5e2143052345edeb205a01558fccd9b8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1c171f739497fcd26589976676ab94b23cd7ee8b
Original-Change-Id: I4aa38379ac356114fc91a32cced2fa45a00a09d6
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/262714
Original-Reviewed-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Original-Tested-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9891
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22 08:50:41 +02:00
..
Config.in libpayload: arch/mips: Add basic MIPS architecture support 2015-03-21 11:07:50 +01:00
Makefile.inc libpayload: mips: Add macros to convert to/from KSEG{0,1} addresses 2015-04-21 08:13:03 +02:00
cache.c
coreboot.c libpayload: mips: Use KSEG1 to access DMA-coherent memory 2015-04-21 08:12:29 +02:00
dummy_media.c
exception.c
exception_asm.S libpayload: mips: Do not set C0_EBase_WG 2015-04-21 08:13:52 +02:00
gdb.c
head.S
libpayload.ldscript libpayload: mips: Set BASE_ADDRESS to 0 2015-04-21 08:12:22 +02:00
main.c
selfboot.c
string.c libpayload: fix a mips memmove() bug 2015-04-22 08:50:41 +02:00
sysinfo.c
timer.c libpayload: mips: add SOC CPU frequency 2015-03-21 11:09:22 +01:00
util.S