Michael Niewöhner 4e8baf9202 soc/intel/*: drop useless XTAL shutdown qualification code ... The XTAL shutdown (dis)qualification bit already unconditionally gets set to 1 by FSP for these platforms, making this code redundant. Change-Id: I7fa4afb0de2af1814e5b91c152d82d7ead310338 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46016 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-10-19 07:09:12 +00:00
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alderlake	soc/intel/*: drop useless XTAL shutdown qualification code	2020-10-19 07:09:12 +00:00
apollolake	soc/intel: Configure PAVP at compile-time	2020-10-12 23:11:04 +00:00
baytrail	src: Rename EM100Pro-specific SPI console Kconfig option	2020-10-13 08:40:52 +00:00
braswell	src: Rename EM100Pro-specific SPI console Kconfig option	2020-10-13 08:40:52 +00:00
broadwell	soc/intel/broadwell/xhci.c: Align with Lynx Point	2020-10-14 08:38:42 +00:00
cannonlake	soc/intel/*: drop useless XTAL shutdown qualification code	2020-10-19 07:09:12 +00:00
common	soc/intel/*: drop useless XTAL shutdown qualification code	2020-10-19 07:09:12 +00:00
denverton_ns	soc/intel/common/block/acpi: Factor out common smbus.asl	2020-10-05 04:00:19 +00:00
elkhartlake	soc/intel/*: drop useless XTAL shutdown qualification code	2020-10-19 07:09:12 +00:00
icelake	soc/intel/*: drop useless XTAL shutdown qualification code	2020-10-19 07:09:12 +00:00
jasperlake	soc/intel/*: drop useless XTAL shutdown qualification code	2020-10-19 07:09:12 +00:00
quark	arch/x86: Introduce ARCH_ALL_STAGES_X86_32	2020-09-26 11:42:28 +00:00
skylake	soc/intel/*: drop useless XTAL shutdown qualification code	2020-10-19 07:09:12 +00:00
tigerlake	soc/intel/*: drop useless XTAL shutdown qualification code	2020-10-19 07:09:12 +00:00
xeon_sp	soc/intel/xeon_sp/cpx: Implement platform_fsp_silicon_init_params_cb	2020-10-19 01:35:50 +00:00
Kconfig