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coreboot-kgpe-d16/src/soc/intel/fsp_broadwell_de
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Werner Zeh 4f2754c720 fsp_broadwell_de: Add Kconfig switch for SERIRQ operation mode 
The serial IRQ (SERIRQ) used by the LPC interface can operate either in
continuous or in quiet mode. Add a Kconfig switch to select the desired
mode. This switch can now be used on mainboard level to enable the
needed mode per mainboard.

Change-Id: Ibe246b88164a622f9c71ebe7bab752a083a49a62
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/16575
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-13 16:52:53 +02:00
..
acpi Remove non-ascii & unprintable characters 2016-08-01 21:44:45 +02:00
bootblock
fsp intel/fsp_broadwell_de: fix SPD CBFS file type 2016-04-20 23:37:29 +02:00
include/soc fsp_broadwell_de: Add Kconfig switch for SERIRQ operation mode 2016-09-13 16:52:53 +02:00
romstage Add newlines at the end of all coreboot files 2016-08-01 21:43:56 +02:00
acpi.c fsp_Broadwell_DE: Do not set IRQ3 and IRQ4 to level 2016-08-11 15:16:40 +02:00
chip.c
chip.h
cpu.c src/soc: Capitalize CPU, ACPI, RAM and ROM 2016-07-31 19:27:53 +02:00
Kconfig fsp_broadwell_de: Add Kconfig switch for SERIRQ operation mode 2016-09-13 16:52:53 +02:00
Makefile.inc fsp_broadwell_de: Add SMBus driver for ramstage 2016-07-14 07:03:40 +02:00
memmap.c
northcluster.c fsp_broadwell_de: Add DMAR table to ACPI 2016-08-03 12:44:25 +02:00
ramstage.c
reset.c
smbus.c fsp_broadwell_de: Add SMBus driver for ramstage 2016-07-14 07:03:40 +02:00
smbus_common.c fsp_broadwell_de: Add SMBus driver for ramstage 2016-07-14 07:03:40 +02:00
southcluster.c fsp_broadwell_de: Add Kconfig switch for SERIRQ operation mode 2016-09-13 16:52:53 +02:00
spi.c fsp_broadwell_de: Adjust printed address in SPI debug messages 2016-09-08 06:12:13 +02:00
uart.c