4f61f56be1
As per EDS Sata port implemented register is byte width (bits[3:0]) hence converting required DWORD based read/write to BYTE width read/write. TEST=Able to boot from SATA device on CML hatch. Change-Id: I545b823318bae461137d41a4490117eba7c87330 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34070 Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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.. | ||
acpi | ||
basecode | ||
block | ||
pch | ||
acpi.h | ||
acpi_wake_source.c | ||
hda_verb.c | ||
hda_verb.h | ||
Kconfig | ||
Makefile.inc | ||
mma.c | ||
mma.h | ||
nhlt.c | ||
reset.c | ||
reset.h | ||
smbios.c | ||
smbios.h | ||
tpm_tis.c | ||
vbt.c | ||
vbt.h |