565 lines
15 KiB
C
565 lines
15 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2003-2004 Linux Networx
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* (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
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* Copyright (C) 2004 David Hendricks <sc@flagen.com>
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* Copyright (C) 2004 Li-Ta Lo <ollie@lanl.gov>
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* Copyright (C) 2005-2006 Tyan
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* (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
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* Copyright (C) 2005-2006 Stefan Reinauer <stepan@openbios.org>
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* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <lib.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/path.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/hypertransport.h>
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struct ht_link {
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struct device *dev;
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unsigned pos;
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unsigned char ctrl_off, config_off, freq_off, freq_cap_off;
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};
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static device_t ht_scan_get_devs(device_t *old_devices)
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{
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device_t first, last;
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first = *old_devices;
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last = first;
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/*
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* Extract the chain of devices to (first through last) for the next
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* hypertransport device.
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*/
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while (last && last->sibling &&
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(last->sibling->path.type == DEVICE_PATH_PCI) &&
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(last->sibling->path.pci.devfn > last->path.pci.devfn))
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{
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last = last->sibling;
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}
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if (first) {
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device_t child;
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/* Unlink the chain from the list of old devices. */
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*old_devices = last->sibling;
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last->sibling = 0;
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/* Now add the device to the list of devices on the bus. */
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/* Find the last child of our parent. */
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for (child = first->bus->children; child && child->sibling; )
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child = child->sibling;
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/* Place the chain on the list of children of their parent. */
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if (child)
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child->sibling = first;
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else
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first->bus->children = first;
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}
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return first;
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}
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static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
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{
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struct ht_link cur[1];
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int linkb_to_host;
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/* Set the hypertransport link width and frequency. */
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/*
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* See which side of the device our previous write to set the unitid
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* came from.
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*/
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cur->dev = dev;
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cur->pos = pos;
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linkb_to_host =
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(pci_read_config16(cur->dev, cur->pos + PCI_CAP_FLAGS) >> 10) & 1;
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if (!linkb_to_host) {
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cur->ctrl_off = PCI_HT_CAP_SLAVE_CTRL0;
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cur->config_off = PCI_HT_CAP_SLAVE_WIDTH0;
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cur->freq_off = PCI_HT_CAP_SLAVE_FREQ0;
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cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
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} else {
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cur->ctrl_off = PCI_HT_CAP_SLAVE_CTRL1;
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cur->config_off = PCI_HT_CAP_SLAVE_WIDTH1;
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cur->freq_off = PCI_HT_CAP_SLAVE_FREQ1;
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cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
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}
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/*
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* Remember the current link as the previous link, but look at the
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* other offsets.
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*/
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prev->dev = cur->dev;
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prev->pos = cur->pos;
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if (cur->ctrl_off == PCI_HT_CAP_SLAVE_CTRL0) {
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prev->ctrl_off = PCI_HT_CAP_SLAVE_CTRL1;
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prev->config_off = PCI_HT_CAP_SLAVE_WIDTH1;
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prev->freq_off = PCI_HT_CAP_SLAVE_FREQ1;
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prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
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} else {
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prev->ctrl_off = PCI_HT_CAP_SLAVE_CTRL0;
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prev->config_off = PCI_HT_CAP_SLAVE_WIDTH0;
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prev->freq_off = PCI_HT_CAP_SLAVE_FREQ0;
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prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
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}
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return 0;
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}
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static unsigned ht_lookup_slave_capability(struct device *dev)
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{
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unsigned pos;
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pos = 0;
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do {
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pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos);
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if (pos) {
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u16 flags;
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flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
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printk(BIOS_SPEW, "flags: 0x%04x\n", flags);
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if ((flags >> 13) == 0) {
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/* Entry is a slave secondary, success... */
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break;
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}
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}
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} while (pos);
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return pos;
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}
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static void ht_collapse_early_enumeration(struct bus *bus,
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unsigned offset_unitid)
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{
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unsigned int devfn;
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struct ht_link prev;
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u16 ctrl;
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/* Initialize the hypertransport enumeration state. */
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prev.dev = bus->dev;
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prev.pos = bus->cap;
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prev.ctrl_off = PCI_HT_CAP_HOST_CTRL;
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prev.config_off = PCI_HT_CAP_HOST_WIDTH;
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prev.freq_off = PCI_HT_CAP_HOST_FREQ;
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prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
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/* Wait until the link initialization is complete. */
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do {
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ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
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/* Is this the end of the hypertransport chain? */
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if (ctrl & (1 << 6))
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return;
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/* Has the link failed? */
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if (ctrl & (1 << 4)) {
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/*
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* Either the link has failed, or we have a CRC error.
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* Sometimes this can happen due to link retrain, so
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* lets knock it down and see if its transient.
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*/
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ctrl |= ((1 << 4) | (1 << 8)); /* Link fail + CRC */
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pci_write_config16(prev.dev, prev.pos + prev.ctrl_off,
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ctrl);
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ctrl = pci_read_config16(prev.dev,
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prev.pos + prev.ctrl_off);
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if (ctrl & ((1 << 4) | (1 << 8))) {
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printk(BIOS_ALERT, "Detected error on "
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"Hypertransport link\n");
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return;
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}
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}
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} while ((ctrl & (1 << 5)) == 0);
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/* Actually, only for one HT device HT chain, and unitid is 0. */
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#if !CONFIG_HT_CHAIN_UNITID_BASE
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if (offset_unitid)
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return;
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#endif
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/* Check if is already collapsed. */
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if ((!offset_unitid) || (offset_unitid
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&& (!((CONFIG_HT_CHAIN_END_UNITID_BASE == 0)
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&& (CONFIG_HT_CHAIN_END_UNITID_BASE
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< CONFIG_HT_CHAIN_UNITID_BASE))))) {
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struct device dummy;
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u32 id;
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dummy.bus = bus;
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dummy.path.type = DEVICE_PATH_PCI;
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dummy.path.pci.devfn = PCI_DEVFN(0, 0);
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id = pci_read_config32(&dummy, PCI_VENDOR_ID);
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if (!((id == 0xffffffff) || (id == 0x00000000)
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|| (id == 0x0000ffff) || (id == 0xffff0000))) {
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return;
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}
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}
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/* Spin through the devices and collapse any early HT enumeration. */
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for (devfn = PCI_DEVFN(1, 0); devfn <= 0xff; devfn += 8) {
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struct device dummy;
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u32 id;
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unsigned pos, flags;
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dummy.bus = bus;
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dummy.path.type = DEVICE_PATH_PCI;
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dummy.path.pci.devfn = devfn;
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id = pci_read_config32(&dummy, PCI_VENDOR_ID);
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if ((id == 0xffffffff) || (id == 0x00000000)
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|| (id == 0x0000ffff) || (id == 0xffff0000)) {
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continue;
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}
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dummy.vendor = id & 0xffff;
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dummy.device = (id >> 16) & 0xffff;
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dummy.hdr_type = pci_read_config8(&dummy, PCI_HEADER_TYPE);
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pos = ht_lookup_slave_capability(&dummy);
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if (!pos)
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continue;
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/* Clear the unitid. */
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flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
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flags &= ~0x1f;
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pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
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printk(BIOS_SPEW, "Collapsing %s [%04x/%04x]\n",
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dev_path(&dummy), dummy.vendor, dummy.device);
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}
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}
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static unsigned int do_hypertransport_scan_chain(struct bus *bus, unsigned min_devfn,
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unsigned max_devfn,
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unsigned *ht_unitid_base,
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unsigned offset_unitid)
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{
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/*
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* Even CONFIG_HT_CHAIN_UNITID_BASE == 0, we still can go through this
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* function, because of end_of_chain check. Also, we need it to
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* optimize link.
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*/
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unsigned int next_unitid, last_unitid, min_unitid, max_unitid;
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device_t old_devices, dev, func, last_func = 0;
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struct ht_link prev;
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int ht_dev_num = 0;
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printk(BIOS_SPEW, "%s for bus %02x\n", __func__, bus->secondary);
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min_unitid = (offset_unitid) ? CONFIG_HT_CHAIN_UNITID_BASE : 1;
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#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
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/*
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* Let's record the device of last HT device, so we can set the unitid
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* to CONFIG_HT_CHAIN_END_UNITID_BASE.
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*/
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unsigned int real_last_unitid = 0, end_used = 0;
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u8 real_last_pos = 0;
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device_t real_last_dev = NULL;
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#endif
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/* Restore the hypertransport chain to it's uninitialized state. */
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ht_collapse_early_enumeration(bus, offset_unitid);
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/* See which static device nodes I have. */
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old_devices = bus->children;
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bus->children = 0;
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/* Initialize the hypertransport enumeration state. */
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prev.dev = bus->dev;
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prev.pos = bus->cap;
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prev.ctrl_off = PCI_HT_CAP_HOST_CTRL;
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prev.config_off = PCI_HT_CAP_HOST_WIDTH;
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prev.freq_off = PCI_HT_CAP_HOST_FREQ;
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prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
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/* If present, assign unitid to a hypertransport chain. */
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last_unitid = min_unitid -1;
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max_unitid = next_unitid = min_unitid;
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do {
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u8 pos;
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u16 flags, ctrl;
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unsigned int count, static_count;
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last_unitid = next_unitid;
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/* Wait until the link initialization is complete. */
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do {
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ctrl = pci_read_config16(prev.dev,
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prev.pos + prev.ctrl_off);
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/* End of chain? */
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if (ctrl & (1 << 6))
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goto end_of_chain;
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if (ctrl & ((1 << 4) | (1 << 8))) {
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/*
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* Either the link has failed, or we have a CRC
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* error. Sometimes this can happen due to link
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* retrain, so lets knock it down and see if
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* it's transient.
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*/
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ctrl |= ((1 << 4) | (1 <<8)); // Link fail + CRC
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pci_write_config16(prev.dev,
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prev.pos + prev.ctrl_off, ctrl);
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ctrl = pci_read_config16(prev.dev,
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prev.pos + prev.ctrl_off);
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if (ctrl & ((1 << 4) | (1 << 8))) {
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printk(BIOS_ALERT, "Detected error on "
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"hypertransport link\n");
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goto end_of_chain;
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}
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}
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} while ((ctrl & (1 << 5)) == 0);
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/* Get and setup the device_structure. */
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dev = ht_scan_get_devs(&old_devices);
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/* See if a device is present and setup the device structure. */
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dev = pci_probe_dev(dev, bus, 0);
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if (!dev || !dev->enabled)
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break;
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/* Find the hypertransport link capability. */
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pos = ht_lookup_slave_capability(dev);
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if (pos == 0) {
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printk(BIOS_ERR, "%s Hypertransport link capability "
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"not found", dev_path(dev));
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break;
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}
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/* Update the unitid of the current device. */
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flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
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/*
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* If the device has a unitid set and is at devfn 0 we are
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* done. This can happen with shadow hypertransport devices,
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* or if we have reached the bottom of a HT device chain.
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*/
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if (flags & 0x1f)
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break;
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flags &= ~0x1f; /* Mask out base Unit ID. */
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count = (flags >> 5) & 0x1f; /* Het unit count. */
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#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
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if (offset_unitid) {
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/* max_devfn will be (0x17<<3)|7 or (0x1f<<3)|7. */
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if (next_unitid > (max_devfn >> 3)) {
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if (!end_used) {
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next_unitid =
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CONFIG_HT_CHAIN_END_UNITID_BASE;
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end_used = 1;
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} else {
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goto end_of_chain;
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}
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}
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}
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#endif
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flags |= next_unitid & 0x1f;
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pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
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/* Update the unitid in the device structure. */
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static_count = 1;
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for (func = dev; func; func = func->sibling) {
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func->path.pci.devfn += (next_unitid << 3);
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static_count = (func->path.pci.devfn >> 3)
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- (dev->path.pci.devfn >> 3) + 1;
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last_func = func;
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}
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/* Compute the number of unitids consumed. */
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printk(BIOS_SPEW, "%s count: %04x static_count: %04x\n",
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dev_path(dev), count, static_count);
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if (count < static_count)
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count = static_count;
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/* Update the unitid of the next device. */
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ht_unitid_base[ht_dev_num] = next_unitid;
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ht_dev_num++;
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#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
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if (offset_unitid) {
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real_last_pos = pos;
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real_last_unitid = next_unitid;
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real_last_dev = dev;
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}
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#endif
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next_unitid += count;
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if (next_unitid > max_unitid)
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max_unitid = next_unitid;
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/* Setup the hypertransport link. */
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bus->reset_needed |= ht_setup_link(&prev, dev, pos);
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printk(BIOS_DEBUG, "%s [%04x/%04x] %s next_unitid: %04x\n",
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dev_path(dev), dev->vendor, dev->device,
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(dev->enabled? "enabled" : "disabled"), next_unitid);
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} while (last_unitid != next_unitid);
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end_of_chain:
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#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
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if (offset_unitid && (ht_dev_num > 1)
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&& (real_last_unitid != CONFIG_HT_CHAIN_END_UNITID_BASE)
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&& !end_used) {
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u16 flags;
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flags = pci_read_config16(real_last_dev,
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real_last_pos + PCI_CAP_FLAGS);
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flags &= ~0x1f;
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flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & 0x1f;
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pci_write_config16(real_last_dev,
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real_last_pos + PCI_CAP_FLAGS, flags);
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for (func = real_last_dev; func; func = func->sibling) {
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func->path.pci.devfn -= ((real_last_unitid
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- CONFIG_HT_CHAIN_END_UNITID_BASE) << 3);
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last_func = func;
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}
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/* Update last one. */
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ht_unitid_base[ht_dev_num-1] = CONFIG_HT_CHAIN_END_UNITID_BASE;
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printk(BIOS_DEBUG, " unitid: %04x --> %04x\n",
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real_last_unitid, CONFIG_HT_CHAIN_END_UNITID_BASE);
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}
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#endif
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next_unitid = max_unitid;
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if (next_unitid > 0x20)
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next_unitid = 0x20;
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if ((bus->secondary == 0) && (next_unitid > 0x18))
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next_unitid = 0x18; /* Avoid K8 on bus 0. */
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/*
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* Die if any leftover static devices are are found. There's probably
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* a problem in devicetree.cb.
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*/
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if (old_devices) {
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device_t left;
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for (left = old_devices; left; left = left->sibling)
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printk(BIOS_DEBUG, "%s\n", dev_path(left));
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printk(BIOS_ERR, "HT: Leftover static devices. "
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"Check your devicetree.cb\n");
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/*
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* Put back the leftover static device, and let pci_scan_bus()
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* disable it.
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*/
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if (last_func && !last_func->sibling)
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last_func->sibling = old_devices;
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}
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return next_unitid;
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}
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unsigned int hypertransport_scan_chain(struct bus *bus)
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{
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int i;
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unsigned int max_devfn;
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u32 ht_unitid_base[4];
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for (i = 0; i < 4; i++)
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ht_unitid_base[i] = 0x20;
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if (bus->secondary == 0)
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max_devfn = (CONFIG_CDB << 3) - 1;
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else
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max_devfn = (0x20 << 3) - 1;
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unsigned int next_unitid = do_hypertransport_scan_chain(bus, 0, max_devfn,
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ht_unitid_base, offset_unit_id(bus->secondary == 0));
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bus->hcdn_reg = 0;
|
|
for (i = 0; i < 4; i++)
|
|
bus->hcdn_reg |= (ht_unitid_base[i] & 0xff) << (i*8);
|
|
|
|
return next_unitid;
|
|
}
|
|
|
|
/**
|
|
* Scan a PCI bridge and the buses behind the bridge.
|
|
*
|
|
* Determine the existence of buses behind the bridge. Set up the bridge
|
|
* according to the result of the scan.
|
|
*
|
|
* This function is the default scan_bus() method for PCI bridge devices.
|
|
*
|
|
* @param bus TODO
|
|
* @param min_devfn TODO
|
|
* @param max_devfn TODO
|
|
*/
|
|
static void hypertransport_scan_chain_x(struct bus *bus,
|
|
unsigned int min_devfn, unsigned int max_devfn)
|
|
{
|
|
unsigned int ht_unitid_base[4];
|
|
unsigned int offset_unitid = 1;
|
|
|
|
unsigned int next_unitid = do_hypertransport_scan_chain(bus, min_devfn, max_devfn,
|
|
ht_unitid_base, offset_unitid);
|
|
|
|
/* Now that nothing is overlapping it is safe to scan the children. */
|
|
pci_scan_bus(bus, 0x00, ((next_unitid - 1) << 3) | 7);
|
|
}
|
|
|
|
void ht_scan_bridge(struct device *dev)
|
|
{
|
|
do_pci_scan_bridge(dev, hypertransport_scan_chain_x);
|
|
}
|
|
|
|
bool ht_is_non_coherent_link(struct bus *link)
|
|
{
|
|
u32 link_type;
|
|
do {
|
|
link_type = pci_read_config32(link->dev, link->cap + 0x18);
|
|
} while (link_type & ConnectionPending);
|
|
|
|
if (!(link_type & LinkConnected))
|
|
return false;
|
|
|
|
do {
|
|
link_type = pci_read_config32(link->dev, link->cap + 0x18);
|
|
} while (!(link_type & InitComplete));
|
|
|
|
return !!(link_type & NonCoherent);
|
|
}
|
|
|
|
/** Default device operations for hypertransport bridges */
|
|
static struct pci_operations ht_bus_ops_pci = {
|
|
.set_subsystem = 0,
|
|
};
|
|
|
|
struct device_operations default_ht_ops_bus = {
|
|
.read_resources = pci_bus_read_resources,
|
|
.set_resources = pci_dev_set_resources,
|
|
.enable_resources = pci_bus_enable_resources,
|
|
.init = 0,
|
|
.scan_bus = ht_scan_bridge,
|
|
.enable = 0,
|
|
.reset_bus = pci_bus_reset,
|
|
.ops_pci = &ht_bus_ops_pci,
|
|
};
|