Sebastian Andrzej Siewior 50dd47bb58 northbridge/sch: Read the GPU memory from the correct PCI device ... The GGC register which contains the size of memory that is used for GPU is in PCI device 2,0 and not 0,0. It is set to to 4MiB in src/mainboard/iwave/iWRainbowG6/romstage.c. Change-Id: Ie9f1cc60544ecd9cad770f34c83c33564a6129d4 Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Reviewed-on: http://review.coreboot.org/1628 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)		2012-10-26 21:54:50 +02:00
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amd	Remove chip.h files without config structure	2012-10-07 12:55:04 +02:00
intel	northbridge/sch: Read the GPU memory from the correct PCI device	2012-10-26 21:54:50 +02:00
rdc	Remove chip.h files without config structure	2012-10-07 12:55:04 +02:00
via	hpet: common ACPI generation	2012-10-08 21:23:08 +02:00
Kconfig	Add the support for RDC R8610 Northbridge	2012-03-27 18:37:57 +02:00
Makefile.inc	Add the support for RDC R8610 Northbridge	2012-03-27 18:37:57 +02:00