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coreboot-kgpe-d16/src/mainboard/google/reef
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Tim Chen 51e238d3b4 mainboard/google/reef: Update DPTF parameters provided from thermal team 
Update the DPTF parameters based on thermal test result.

1. Update DPTF CPU/TSR0/TSR1/TSR2 passive/critial trigger points.
   CPU  passive point:61
   TSR0 passive point:120, critial point:125
   TSR1 passive point:46,  critial point:75
   TSR2 passive point:100, critial point:125

2. Update PL1/PL2 Min Power Limit/Max Power Limit
   Set PL1 min to 3W, and max to 6W
   Set PL2 min to 8W

3. Change thermal relationship table (TRT) setting.
   Change CPU Throttle Effect on CPU sample rate to 80secs
   Change CPU Effect on Temp Sensor 0 sample rate to 120secs
   The TRT of TCHG is TSR1, but real sensor is TSR2.
   Change Charger Effect on Temp Sensor 2 sample rate to 120secs
   Change CPU Effect on Temp Sensor 2 sample rate to 120secs

BUG=chrome-os-partner:60038
BRANCH=master
TEST=build and boot on electro dut

Change-Id: I7a701812cb45f51828a3cbb3343e03817645110e
Signed-off-by: Tim Chen <Tim-Chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/17466
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-11-20 16:32:53 +01:00
..
variants mainboard/google/reef: Update DPTF parameters provided from thermal team 2016-11-20 16:32:53 +01:00
acpi_tables.c mainboard/google: add reef reference board 2016-05-13 22:38:53 +02:00
board_info.txt mainboard/google: add reef reference board 2016-05-13 22:38:53 +02:00
boardid.c mainboard/google/reef: add variant API for board_id and gpio 2016-09-06 20:04:18 +02:00
bootblock.c mainboards,ec: provide common declaration for mainboard_ec_init() 2016-09-26 23:53:12 +02:00
chromeos.c google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
chromeos.fmd mainboard/google/reef: Add support for RECOVERY_MRC_CACHE 2016-11-10 00:55:52 +01:00
dsdt.asl mainboards/google/reef: use chromeec's ASL lid switch implementation 2016-09-26 23:52:53 +02:00
ec.c mainboards,ec: provide common declaration for mainboard_ec_init() 2016-09-26 23:53:12 +02:00
Kconfig google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
Kconfig.name mainboard/google/reef: add snappy variant 2016-10-20 20:18:52 +02:00
mainboard.c mainboard/google/reef: allow variants to override NHLT OEM strings 2016-10-28 19:02:35 +02:00
Makefile.inc mainboard/google/reef: provide baseboard and variant concepts 2016-09-04 05:36:43 +02:00
romstage.c mainboard/google/reef: add baseboard memory configuration 2016-09-06 20:16:32 +02:00
smihandler.c google/reef: Remove setting of GPIO_TIER1_SCI enable bit 2016-09-15 01:20:06 +02:00