661ad4666c
Having some symmetry with <soc/nvs.h> now allows to reduce the amount of gluelogic to determine the size and cbmc field of struct global_nvs. Since GNVS creation is now controlled by ACPI_SOC_NVS, drivers/amd/agesa/nvs.c becomes obsolete and soc/amd/cezanne cannot have this selected until <soc/nvs.h> exists. Change-Id: Ia9ec853ff7f5e7908f7e8fc179ac27d0da08e19d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49344 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Lance Zhao
42 lines
1.1 KiB
Text
42 lines
1.1 KiB
Text
# SPDX-License-Identifier: GPL-2.0-only
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config SOUTHBRIDGE_INTEL_I82801GX
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bool
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select ACPI_INTEL_HARDWARE_SLEEP_VALUES
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select ACPI_SOC_NVS
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select AZALIA_PLUGIN_SUPPORT
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select IOAPIC
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select USE_WATCHDOG_ON_BOOT
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select HAVE_SMI_HANDLER
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select SOUTHBRIDGE_INTEL_COMMON_GPIO
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select SOUTHBRIDGE_INTEL_COMMON_SMBUS
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select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS
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select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7 if BOOT_DEVICE_SPI_FLASH
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select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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select HAVE_INTEL_CHIPSET_LOCKDOWN
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select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
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select INTEL_HAS_TOP_SWAP
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select SOUTHBRIDGE_INTEL_COMMON_SMM
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select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
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select SOUTHBRIDGE_INTEL_COMMON_RTC
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select SOUTHBRIDGE_INTEL_COMMON_RESET
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select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
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select SOUTHBRIDGE_INTEL_COMMON_HPET
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if SOUTHBRIDGE_INTEL_I82801GX
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config EHCI_BAR
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hex
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default 0xfef00000
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config HPET_MIN_TICKS
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hex
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default 0x80
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config INTEL_TOP_SWAP_BOOTBLOCK_SIZE
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hex
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# Always 64K, all other options are invalid
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default 0x10000
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endif
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