4c72d3612b
This removes the newlines from all files found by the new int-015-final-newlines script. Change-Id: I65b6d5b403fe3fa30b7ac11958cc0f9880704ed7 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/15975 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
71 lines
1.8 KiB
C
71 lines
1.8 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include <soc/mtcmos.h>
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#include <soc/spm.h>
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enum {
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SRAM_ISOINT_B = 1U << 6,
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SRAM_CKISO = 1U << 5,
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PWR_CLK_DIS = 1U << 4,
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PWR_ON_2ND = 1U << 3,
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PWR_ON = 1U << 2,
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PWR_ISO = 1U << 1,
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PWR_RST_B = 1U << 0
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};
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enum {
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SRAM_PDN = 0xf << 8,
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DIS_SRAM_ACK = 0x1 << 12,
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AUD_SRAM_ACK = 0xf << 12,
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};
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enum {
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DIS_PWR_STA_MASK = 0x1 << 3,
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AUD_PWR_STA_MASK = 0x1 << 24,
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};
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static void mtcmos_power_on(u32 *pwr_con, u32 pwr_sta_mask)
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{
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write32(&mt8173_spm->poweron_config_set,
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(SPM_PROJECT_CODE << 16) | (1U << 0));
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setbits_le32(pwr_con, PWR_ON);
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setbits_le32(pwr_con, PWR_ON_2ND);
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while (!(read32(&mt8173_spm->pwr_status) & pwr_sta_mask) ||
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!(read32(&mt8173_spm->pwr_status_2nd) & pwr_sta_mask))
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continue;
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clrbits_le32(pwr_con, PWR_CLK_DIS);
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clrbits_le32(pwr_con, PWR_ISO);
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setbits_le32(pwr_con, PWR_RST_B);
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clrbits_le32(pwr_con, SRAM_PDN);
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}
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void mtcmos_audio_power_on(void)
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{
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mtcmos_power_on(&mt8173_spm->audio_pwr_con, AUD_PWR_STA_MASK);
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while (read32(&mt8173_spm->audio_pwr_con) & AUD_SRAM_ACK)
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continue;
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}
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void mtcmos_display_power_on(void)
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{
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mtcmos_power_on(&mt8173_spm->dis_pwr_con, DIS_PWR_STA_MASK);
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while (read32(&mt8173_spm->dis_pwr_con) & DIS_SRAM_ACK)
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continue;
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}
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