226 lines
8.9 KiB
Markdown
226 lines
8.9 KiB
Markdown
# OCP Delta Lake
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This page describes coreboot support status for the [OCP] (Open Compute Project)
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Delta Lake server platform.
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## Introduction
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OCP Delta Lake server platform is a component of multi-host server system
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Yosemite-V3. Both [Delta Lake server design spec] and [Yosemite-V3 design
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spec] were [OCP] accepted.
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On the other hand, Wiwynn's Yosemite-V3 system and Delta Lake server product
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along with its OSF implementation, which is based on FSP/coreboot/LinuxBoot
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stack, was [OCP] accepted; For details, check:
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- [The OCP blog]
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- [The Wiwynn Press Release]
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- [The Wiwynn's Yosemite-V3 product in OCP market place]
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Wiwynn and 9Elements formed a partnership to offer the Wiwynn's Yosemite-V3
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product and OSF for it.
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Delta Lake server is a single socket Cooper Lake Scalable Processor (CPX-SP) server.
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Intel Cooper Lake Scalable Processor was launched in Q2 2020.
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Yosemite-V3 has multiple configurations. Depending on configurations, it may
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host up to 4 Delta Lake servers (blades) in one sled.
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The Yosemite-V3 system is in mass production. Meta, Intel and partners
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jointly develop Open System Firmware (OSF) solution on Delta Lake as an alternative
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solution. The OSF solution reached production quality for some use cases
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in July, 2021.
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## How to build
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OSF code base is publicly available at
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https://github.com/opencomputeproject/OpenSystemFirmware
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Run following commands to build Delta Lake OSF image from scratch:
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git clone https://github.com/opencomputeproject/OpenSystemFirmware.git
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cd OpenSystemFirmware/Wiwynn/deltalake && ./download_and_build.sh
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The Delta Lake OSF code base leverages [osf-builder] to sync down coreboot,
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Linux kernel and u-root code from their upstream repo, and sync down needed
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binary blobs. [osf-builder] also provides the top level build system.
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Besides coreboot, the Delta Lake OSF solution includes following components:
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- FSP blob: The blobs (Intel Cooper Lake Scalable Processor Firmware Support Package)
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is downloaded from https://github.com/intel/FSP/tree/master/CedarIslandFspBinPkg.
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- Microcode: downloaded from github.com/intel/Intel-Linux-Processor-Microcode-Data-Files.
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- ME ignition binary: downloaded from
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https://github.com/tianocore/edk2-non-osi/tree/master/Silicon/Intel/PurleySiliconBinPkg/MeFirmware
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- ACM binaries: only required for CBnT enablement. Available under NDA with Intel.
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- Payload: LinuxBoot is necessary when LinuxBoot is used as the coreboot payload.
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U-root as initramfs, is used in the joint development. It is built
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following [All about u-root].
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The Delta Lake OSF solution is updated periodically to newer versions of
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upstream coreboot code base and other components.
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## How to verify Delta Lake OSF image
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To do in-band FW image update, use [flashrom]:
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flashrom -p internal:ich_spi_mode=hwseq -c "Opaque flash chip" --ifd \
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-i bios --noverify-all -w <path to coreboot image>
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From OpenBMC, to update FW image:
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fw-util slotx --update bios <path to coreboot image>
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To power off/on the host:
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power-util slotx off
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power-util slotx on
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To connect to console through SOL (Serial Over Lan):
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sol-util slotx
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## How to work on coreboot for Delta Lake
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After the OSF image for Delta Lake is built and verified, under
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OpenSystemFirmware/Wiwynn/deltalake directory:
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cd src/osf-builder/projects/craterlake/coreboot
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Run "git remote -v" to confirm the origin is from coreboot upstream repo.
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Run "git branch -v" to know the confirmed working coreboot commit ID for the
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Delta Lake OSF solution.
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Fetch down the tip of coreboot upstream repo, run "make" to build a new OSF
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image for Delta Lake, verify that it works.
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Now you are in a familiar coreboot environment, happy coding!
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## Firmware configurations
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[ChromeOS VPD] is used to store most of the firmware configurations.
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RO_VPD region holds default values, while RW_VPD region holds customized
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values.
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VPD variables supported are:
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- firmware_version: This variable holds overall firmware version. coreboot
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uses that value to populate smbios type 1 version field.
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- bmc_bootorder_override: When it's set to 1 IPMI OEM command can override boot
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order. The boot order override is done in the u-root LinuxBoot payload.
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- systemboot_log_level: u-root package systemboot log levels, would be mapped to
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quiet/verbose in systemboot as that is all we have for now. 5 to 8 would be
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mapped to verbose, 0 to 4 and 9 would be mapped to quiet.
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- VPDs affecting coreboot are listed/documented in [src/mainboard/ocp/deltalake/vpd.h].
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## Features
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The solution is developed using LinuxBoot payload with Linux kernel 5.2.9,
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and [u-root] as initramfs.
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- SMBIOS:
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- Type 0 -- BIOS Information
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- Type 1 -- System Information
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- Type 2 -- Baseboard Information
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- Type 3 -- System Enclosure or Chassis
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- Type 4 -- Processor Information
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- Type 7 -- Cache Information
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- Type 8 -- Port Connector Information
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- Type 9 -- PCI Slot Information
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- Type 11 -- OEM String
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- Type 16 -- Physical Memory Array
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- Type 17 -- Memory Device
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- Type 19 -- Memory Array Mapped Address
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- Type 32 -- System Boot Information
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- Type 38 -- IPMI Device Information
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- Type 41 -- Onboard Devices Extended Information
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- Type 127 -- End-of-Table
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- BMC integration:
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- BMC readiness check
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- IPMI commands
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- watchdog timer
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- POST complete pin acknowledgement
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- Check BMC version: ipmidump -device
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- SEL record generation
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- Converged Bootguard and TXT (CBnT)
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- TPM
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- Bootguard profile 0T
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- TXT
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- SRTM
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- DRTM (verified through tboot)
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- unsigned KM/BPM generation
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- KM/BPM signing
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- memory secret clearance upon ungraceful shutdown
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- Early serial output
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- port 80h direct to GPIO
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- ACPI tables: APIC/DMAR/DSDT/EINJ/FACP/FACS/HEST/HPET/MCFG/SPMI/SRAT/SLIT/SSDT
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- Skipping memory training upon subsequent reboots by using MRC cache
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- BMC crash dump
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- Error injection through ITP
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- Versions
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- Check FSP version: cbmem | grep LB_TAG_PLATFORM_BLOB_VERSION
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- Check Microcode version: cat /proc/cpuinfo | grep microcode
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- Devices:
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- Boot drive
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- All 5 data drives
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- NIC card
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- Power button
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- localboot
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- netboot from IPv6
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- RAS (SMI handlers not upstreamed)
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- EINJ/HEST
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- error injection through ITP
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- memory error handling
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- PCIe error handling
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- PCIe live error recovery (LER)
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## Stress/performance tests passed
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- OS warm reboot (1000 cycles)
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- DC reboot (1000 cycles)
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- AC reboot (1000 cycle)
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- Mprime test (6 hours)
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- StressAppTest (6 hours)
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- Ptugen (6 hours)
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## Performance on par with traditional firmware
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- coremark
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- FIO
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- Iperf(IPv6)
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- Linpack
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- Intel MLC (memory latency and bandwidth)
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- SpecCPU
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- stream
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## Other tests passed
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- Power
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- Thermal
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- coreboot address sanitizer (both romstage and ramstage)
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- Intel selftest tool (all errors analyzed; applicable errors clean)
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## Known issues
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- HECI access at OS run time:
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- spsInfoLinux64 command fail to return ME version
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- ptugen command fail to get memory power
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- CLTT (Closed Loop Thermal Throttling, eg. thermal protection for DIMMs)
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- ProcHot (thermal protection for processors)
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## Feature gaps
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- flashrom command not able to update ME region
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- ACPI BERT table
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- PCIe hotplug through VPP (Virtual Pin Ports)
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- RO_VPD region as well as other RO regions are not write protected
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- Not able to selectively enable/disable core
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## Technology
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```eval_rst
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+------------------------+---------------------------------------------+
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| Processor (1 socket) | Intel Cooper Lake Scalable Processor |
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+------------------------+---------------------------------------------+
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| BMC | Aspeed AST 2500 |
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+------------------------+---------------------------------------------+
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| PCH | Intel Lewisburg C620 Series |
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+------------------------+---------------------------------------------+
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```
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[OCP]: https://www.opencompute.org
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[Delta Lake server design spec]: https://www.opencompute.org/documents/delta-lake-1s-server-design-specification-1v05-pdf
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[Yosemite-V3 design spec]: https://www.opencompute.org/documents/ocp-yosemite-v3-platform-design-specification-1v16-pdf
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[The OCP blog]: https://www.opencompute.org/blog/open-system-firmware-for-ocp-server-deltalake-is-published
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[The Wiwynn Press Release]: https://www.prnewswire.com/news-releases/wiwynn-successfully-implemented-open-system-firmware-on-its-ocp-yosemite-v3-server-301417374.html?tc=eml_cleartime
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[The Wiwynn's Yosemite-V3 product in OCP market place]: https://www.opencompute.org/products/423/wiwynn-yosemite-v3-server
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[osf-builder]: https://github.com/facebookincubator/osf-builder
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[OCP virtual summit 2020]: https://www.opencompute.org/summit/virtual-summit/schedule
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[flashrom]: https://flashrom.org/Flashrom
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[All about u-root]: https://github.com/linuxboot/book/tree/master/u-root
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[u-root]: https://u-root.org/
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[ChromeOS VPD]: https://chromium.googlesource.com/chromiumos/platform/vpd/+/master/README.md
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[src/mainboard/ocp/deltalake/vpd.h]: https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/src/mainboard/ocp/deltalake/vpd.h
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