55822d9587
In the case of SoCs hat have more than one PCI root, we need to check to which PCI root the PCI bus number, IO and MMIO regions configured in the data fabric registers get routed to and only tell the resource allocator about the resources that get routed to the current PCI root domain. For this the numbers of the domains need to match the PCI root's destination data fabric ID. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ib6a6412f733d321044678d2b064c33418a53861c Reviewed-on: https://review.coreboot.org/c/coreboot/+/77113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com> |
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amd | ||
cavium | ||
example/min86 | ||
intel | ||
mediatek | ||
nvidia | ||
qualcomm | ||
rockchip | ||
samsung | ||
sifive/fu540 | ||
ti | ||
ucb/riscv |