Angel Pons 6bd99f9ada soc/intel/skylake: Clean up SD GPIO handling ... This is to align with newer platforms. Change-Id: If33ea3a7835ec071be3fd060f9712c47678bd6bf Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50963 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-03-01 19:37:36 +00:00
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acpi	mb/intel/latest mainboards: Get rid of power button device in coreboot	2020-10-13 03:53:09 +00:00
spd	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
Kconfig	soc/intel/skylake: Move MAX_CPUS from mb to SoC	2021-01-06 19:34:20 +00:00
Kconfig.name	…
Makefile.inc	arch/x86: Use wildcard for mb/smihandler.c	2021-01-24 21:06:22 +00:00
board_info.txt	…
bootblock_mainboard.c	…
chromeos.c	…
chromeos.fmd	…
cmos.layout	mb/**/cmos.layout: Drop copy-pasted SNB entries on non-SNB	2020-11-24 17:47:15 +00:00
devicetree.cb	soc/intel/skylake: Clean up SD GPIO handling	2021-03-01 19:37:36 +00:00
dsdt.asl	ACPI: Move include for <vc/google/chromeos.asl>	2021-01-28 08:59:54 +00:00
ec.c	…
ec.h	…
gpio.h	soc/intel,mb/*: get rid of legacy pad macros	2020-10-21 07:16:01 +00:00
mainboard.c	mb/intel: Drop unneeded empty lines	2020-09-21 16:24:45 +00:00
ramstage.c	…
romstage.c	…
smihandler.c	…