coreboot-kgpe-d16/src/soc/intel
Subrata Banik 55fb6b4d0d soc/intel/icelake: Enable support for FSP 2.1 specification
Remove FSP 2.0 support from ICL SoC and add FSP 2.1 support.

Change-Id: Ife0c133ddbf2e0fa14f94ffec15d11830cfaf7b3
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30158
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-19 21:42:30 +00:00
..
apollolake src: Drop unused 'include <arch/acpigen.h>' 2019-03-12 07:27:28 +00:00
baytrail src: Drop unused '#include <halt.h>' 2019-03-16 11:46:58 +00:00
braswell soc/intel/braswell: Use IRQ 9 for SCI 2019-03-19 21:37:37 +00:00
broadwell src: Drop unused 'include <device/pciexp.h>' 2019-03-16 11:46:38 +00:00
cannonlake soc/intel/cannonlake: Pass coreboot debug interface info to FSP 2019-03-18 09:18:18 +00:00
common Fix 'unsigned int' to bare use of 'unsigned' 2019-03-19 04:45:58 +00:00
denverton_ns src: Drop unused 'include <romstage_handoff.h>' 2019-03-18 12:05:59 +00:00
fsp_baytrail drivers/intel/fsp1_0: Deduplicate code 2019-03-16 09:01:50 +00:00
fsp_broadwell_de src: Drop unused 'include <romstage_handoff.h>' 2019-03-18 12:05:59 +00:00
icelake soc/intel/icelake: Enable support for FSP 2.1 specification 2019-03-19 21:42:30 +00:00
quark coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) 2019-03-08 08:33:24 +00:00
skylake src: Drop unused 'include <romstage_handoff.h>' 2019-03-18 12:05:59 +00:00
Kconfig src/cpu: Remove dead sourced lines 2018-11-15 10:25:20 +00:00