coreboot-kgpe-d16/src/mainboard/google/fizz
Naresh G Solanki 561f7fcf67 mb/google/fizz: Configure PCI root port
Configure PCI root port as per schematic.

Change-Id: I10ef682e8c54e22f328db5105d4da39c72ac2bed
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/19390
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-04-24 19:31:18 +02:00
..
acpi
acpi_tables.c
board_info.txt
boardid.c
bootblock.c
chromeos.c vboot: Assume EC_SOFTWARE_SYNC and VIRTUAL_DEV_SWITCH by default 2017-03-28 22:15:46 +02:00
chromeos.fmd
devicetree.cb mb/google/fizz: Configure PCI root port 2017-04-24 19:31:18 +02:00
dsdt.asl
ec.c
ec.h
gpio.h google/fizz: Transfer gpio from schematic 2017-03-23 21:09:40 +01:00
Kconfig google/fizz: Configure memory 2017-04-24 19:17:47 +02:00
Kconfig.name
mainboard.c
Makefile.inc
ramstage.c
romstage.c google/fizz: Configure memory 2017-04-24 19:17:47 +02:00
smihandler.c