coreboot-kgpe-d16/src/mainboard/amd/lamar/Kconfig
Kyösti Mälkki 903ce25040 binaryPI: Introduce BINARYPI_LEGACY_WRAPPER and its counterpart
We define BINARYPI_LEGACY_WRAPPER a method of calling AGESA
via functions in agesawrapper.c file. The approach implemented
there makes it very inconvenient to do board-specific
customisation or present common platform-specific features.
Seems like it also causes assertion errors on AGESA side.
The flag is applied here to all boards and then individually
removed one at a time, as things get tested.

New method is not to call AGESA internal functions directly,
but via the dispatcher. AGESA call parameters are routed to
hooks in both platform and board -directories, to allow for
easy capture or modification as needed.

For each AGESA dispatcher call made, eventlog entries are
replayed to the console log. Also relocations of AGESA heap
that took place are recorded.

New method is expected to be compatible with binaryPI.

Change-Id: I2900249e60f21a13dc231f4a8a04835e090109d5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19272
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-08-02 05:11:04 +00:00

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#
# This file is part of the coreboot project.
#
# Copyright (C) 2012 - 2014 Advanced Micro Devices, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
if BOARD_AMD_LAMAR
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select BINARYPI_LEGACY_WRAPPER
select CPU_AMD_PI_00630F01
select NORTHBRIDGE_AMD_PI_00630F01
select SOUTHBRIDGE_AMD_PI_BOLTON
select SUPERIO_FINTEK_F81216H
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_8192
select GFXUMA
config MAINBOARD_DIR
string
default amd/lamar
config MAINBOARD_PART_NUMBER
string
default "DB-FP3"
config MAINBOARD_SERIAL_NUMBER
string
default "52198A"
config MAX_CPUS
int
default 4
config IRQ_SLOT_COUNT
int
default 11
config ONBOARD_VGA_IS_PRIMARY
bool
default y
config HUDSON_XHCI_FWM_FILE
string
default "3rdparty/blobs/southbridge/amd/bolton/xhci.bin"
config AZ_PIN
hex
default 0x02
config ENABLE_DP3_DAUGHTER_CARD_IN_J120
bool "Use J120 as an additional graphics port"
default n
help
The PCI Express slot at J120 can be configured as an additional
DisplayPort connector using an adapter card from AMD or as a normal
PCI Express (x4) slot.
By default, the connector is configured as a PCI Express (x4) slot.
Select this option to enable the slot for use with one of AMD's
passive graphics port expander cards (only available from AMD).
endif # BOARD_AMD_LAMAR