coreboot-kgpe-d16/src/mainboard/intel/cannonlake_rvp/chromeos.fmd
Lijian Zhao 18f8f622d5 mainboard/intel/cannonlake: Add ec entry into flashmap
Add EC entries into chromeos.fmd file.

BRANCH=None
BUG=None
TEST=Flash image and confirm system can get out of reset successfully.
System will not be able to reach reset vector if flash map described in 
coreboot does not match intel flash map generated from fit.

Change-Id: Ic18ce59941b4ff8171fe661d332e3e521d988341
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/21526
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-09-15 21:36:14 +00:00

44 lines
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Text

FLASH@0xff000000 0x1000000 {
SI_ALL@0x0 0x380000 {
SI_DESC@0x0 0x1000
SI_EC@0x01000 0x80000
SI_ME@0x81000 0x2ff000
}
SI_BIOS@0x380000 0xc80000 {
RW_SECTION_A@0x0 0x368000 {
VBLOCK_A@0x0 0x10000
FW_MAIN_A(CBFS)@0x10000 0x357fc0
RW_FWID_A@0x367fc0 0x40
}
RW_SECTION_B@0x368000 0x368000 {
VBLOCK_B@0x0 0x10000
FW_MAIN_B(CBFS)@0x10000 0x357fc0
RW_FWID_B@0x367fc0 0x40
}
RW_MISC@0x6d0000 0x30000 {
UNIFIED_MRC_CACHE@0x0 0x20000 {
RECOVERY_MRC_CACHE@0x0 0x10000
RW_MRC_CACHE@0x10000 0x10000
}
RW_ELOG@0x20000 0x4000
RW_SHARED@0x24000 0x4000 {
SHARED_DATA@0x0 0x2000
VBLOCK_DEV@0x2000 0x2000
}
RW_VPD@0x28000 0x2000
RW_NVRAM@0x2a000 0x6000
}
RW_LEGACY(CBFS)@0x700000 0x200000
WP_RO@0x900000 0x380000 {
RO_VPD@0x0 0x4000
RO_UNUSED@0x4000 0xc000
RO_SECTION@0x10000 0x370000 {
FMAP@0x0 0x800
RO_FRID@0x800 0x40
RO_FRID_PAD@0x840 0x7c0
GBB@0x1000 0xef000
COREBOOT(CBFS)@0xf0000 0x280000
}
}
}
}