Ronald G. Minnich 574df1ba67 riscv: start to use the configstring functions ... These functions will allow us to remove hardcodes, as long as we can verify the qemu and lowrisc targets implement the configstring correctly. Hence, for the most part, we'll start with mainboard changes first. Define a new config variable, CONFIG_RISCV_CONFIGSTRING, which has a default value that works on all existing systems but which can be changed as needed for a new SOC or mainboard. Change-Id: I7dd3f553d3e61f1c49752fb04402b134fdfdf979 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: https://review.coreboot.org/17256 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>		2016-11-12 19:23:22 +01:00
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board_info.txt	Add board URLs for the RISC-V boards	2016-04-28 19:19:27 +02:00
devicetree.cb
Kconfig	Kconfig: lay groundwork for not assuming SPI flash boot device	2016-08-18 06:18:21 +02:00
Kconfig.name
mainboard.c	riscv and power8: Convert printk/while(1) to die	2016-10-15 00:24:46 +02:00
Makefile.inc	riscv: Unify SBI call implementations under arch/riscv/	2016-11-07 16:47:49 +01:00
memlayout.ld	RISCV: Clean up the common architectural code	2016-10-24 20:25:04 +02:00
rom_media.c	spike-riscv: Look for the CBFS in RAM	2016-07-14 18:24:34 +02:00
romstage.c	riscv: start to use the configstring functions	2016-11-12 19:23:22 +01:00
uart.c	riscv: Unify SBI call implementations under arch/riscv/	2016-11-07 16:47:49 +01:00