..
car
Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR
2014-01-15 15:26:48 +01:00
ep80579
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
fit
x86 intel: Add Firmware Interface Table support
2013-03-17 22:53:51 +01:00
fsp_model_206ax
Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT
2014-05-10 11:27:25 +02:00
haswell
Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT
2014-05-10 11:27:25 +02:00
hyperthreading
Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT
2014-05-10 11:27:25 +02:00
microcode
intel: fix microcode compilation failure in bootblock
2014-01-28 19:54:29 +01:00
model_6bx
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_6dx
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_6ex
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_6fx
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_6xx
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_65x
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_67x
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_68x
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_69x
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_106cx
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_206ax
Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT
2014-05-10 11:27:25 +02:00
model_1067x
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_2065x
Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT
2014-05-10 11:27:25 +02:00
model_f0x
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_f1x
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_f2x
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_f3x
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
model_f4x
Introduce stage-specific architecture for coreboot
2014-05-06 20:23:31 +02:00
slot_1
cpu/intel: Make all Intel CPUs load microcode from CBFS
2014-01-16 05:34:25 +01:00
slot_2
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
2013-03-01 10:16:08 +01:00
socket_441
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
2013-03-01 10:16:08 +01:00
socket_BGA956
intel/socket_BGA956: enable speedstep, CAR, MMX, SSE
2012-11-06 21:51:43 +01:00
socket_FC_PGA370
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
2013-03-01 10:16:08 +01:00
socket_LGA771
Remove chip.h files without config structure
2012-10-07 12:55:04 +02:00
socket_LGA775
Fix socket LGA775
2013-03-07 00:46:32 +01:00
socket_mFCBGA479
Remove chip.h files without config structure
2012-10-07 12:55:04 +02:00
socket_mFCPGA478
Remove chip.h files without config structure
2012-10-07 12:55:04 +02:00
socket_mPGA478
Remove chip.h files without config structure
2012-10-07 12:55:04 +02:00
socket_mPGA479M
Remove chip.h files without config structure
2012-10-07 12:55:04 +02:00
socket_mPGA603
Fix typo in mPGA603 socket
2012-10-07 21:48:37 +02:00
socket_mPGA604
Remove chip.h files without config structure
2012-10-07 12:55:04 +02:00
socket_PGA370
cpu/intel: Make all Intel CPUs load microcode from CBFS
2014-01-16 05:34:25 +01:00
socket_rPGA989
Remove chip.h files without config structure
2012-10-07 12:55:04 +02:00
speedstep
sconfig: rename lapic_cluster -> cpu_cluster
2013-02-14 07:07:20 +01:00
thermal_monitoring
drop unused code (trivial)
2008-08-01 11:53:39 +00:00
turbo
cpu/intel: allow non-packaged scoped turbo setting
2014-01-30 06:10:26 +01:00
Kconfig
cpu/intel: allow non-packaged scoped turbo setting
2014-01-30 06:10:26 +01:00
Makefile.inc
Add the Intel FSP 206ax CPU core support
2013-12-04 18:45:42 +01:00