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coreboot-kgpe-d16/src/soc/intel/baytrail
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Aaron Durbin 580b1ad618 baytrail: add C0 microcode update 
Include C0 microcode drop.

BUG=None
BRANCH=rambi,squawks
TEST=Built. Booted B3 part.

Change-Id: If454658235cd5a7b8640de0b3fa12dccddb0e9f6
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182080
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/5041
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-13 21:02:40 +02:00
..
acpi baytrail: dptf: Add disable trip point methods 2014-05-13 21:01:38 +02:00
baytrail baytrail: clear the pmc wake status registers 2014-05-13 16:11:25 +02:00
bootblock baytrail: load microcode in bootblock 2014-02-05 05:24:13 +01:00
microcode baytrail: add C0 microcode update 2014-05-13 21:02:40 +02:00
romstage baytrail: reboot with EC in S0 with no MRC cache and EC in RW 2014-05-13 21:02:09 +02:00
acpi.c baytrail: Basic DPTF framework 2014-05-09 05:42:52 +02:00
chip.c baytrail: add support for disabling south cluster pci devices 2014-02-27 06:12:43 +01:00
chip.h baytrail: Add support for LPSS and SCC devices in ACPI mode 2014-05-10 06:30:36 +02:00
cpu.c baytrail: add cpuid for C0 2014-05-13 16:10:50 +02:00
ehci.c baytrail: utilize reg_script_run_on_dev() 2014-05-10 06:31:29 +02:00
elog.c baytrail: log reset, power, and wake events in elog 2014-05-13 16:11:13 +02:00
emmc.c baytrail: Put devices in ACPI mode after setup 2014-05-12 22:08:22 +02:00
gfx.c baytrail: utilize reg_script_run_on_dev() 2014-05-10 06:31:29 +02:00
gpio.c baytrail: gpio: Make GPIO inputs MMIO by default 2014-05-08 07:07:17 +02:00
iosf.c baytrail: add more iosf access functions 2014-05-10 06:31:00 +02:00
Kconfig baytrail: romstage: Add config option to enable RMT 2014-05-07 22:07:03 +02:00
lpe.c baytrail: lpe audio device needs memory for its firmware 2014-05-09 05:41:20 +02:00
lpss.c baytrail: Put devices in ACPI mode after setup 2014-05-12 22:08:22 +02:00
Makefile.inc baytrail: log reset, power, and wake events in elog 2014-05-13 16:11:13 +02:00
memmap.c baytrail: SMM support 2014-02-16 20:57:14 +01:00
mrc_cache.c
northcluster.c baytrail: Add function to read top of low memory 2014-04-30 23:11:21 +02:00
nvm.c
pcie.c baytrail: utilize reg_script_run_on_dev() 2014-05-10 06:31:29 +02:00
perf_power.c baytrail: align with intel recommendations 2014-05-12 22:11:10 +02:00
placeholders.c baytrail: Add ACPI CPU entries 2014-05-06 18:39:04 +02:00
pmutil.c baytrail: clear the pmc wake status registers 2014-05-13 16:11:25 +02:00
ramstage.c baytrail: note S3 resume status earlier 2014-05-10 06:31:37 +02:00
refcode.c baytrail: add way to load reference code from vboot area 2014-05-12 22:10:33 +02:00
reset.c baytrail: add reset support 2014-02-11 22:22:25 +01:00
sata.c baytrail: Add SATA driver 2014-02-27 06:13:30 +01:00
scc.c baytrail: utilize reg_script_run_on_dev() 2014-05-10 06:31:29 +02:00
sd.c baytrail: Add support for LPSS and SCC devices in ACPI mode 2014-05-10 06:30:36 +02:00
smihandler.c baytrail: add GPIO SMI support 2014-05-06 18:39:29 +02:00
smm.c baytrail: don't SMI on tco timer firing 2014-05-13 16:11:40 +02:00
southcluster.c baytrail: configure acpi SCI irq 2014-05-06 17:17:40 +02:00
spi.c
stage_cache.c baytrail: allow ramstage_cache_location() usage in ramstage 2014-05-10 06:31:52 +02:00
tsc_freq.c baytrail: Add BCLK and IACORE to pattrs 2014-05-06 18:38:58 +02:00
xhci.c baytrail: utilize reg_script_run_on_dev() 2014-05-10 06:31:29 +02:00