Take codec out of reset (GPIO_PH1 aka CODEC_RST_L) and enable LDO2
(GPIO_PR2/KB_ROW2 aka AUDIO_ENABLE). Muxes are setup and the two
GPIOs are set to output and driven high.
BUG=chrome-os-partner:32582
BRANCH=none
TEST=RealTek ALC5677 codec shows up in I2C6 scan at address 0x2D,
can read/write registers.
Change-Id: I236850452d401fd89b4f59eb03f132c0be32fb20
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4fe3b0c1a3f5d6264b83d7a7e2363dc3f3235cbf
Original-Change-Id: Iedce7bb9f8e61d3b8cd693fc5e567323d89f8046
Original-Signed-off-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/228920
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9419
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
58901b6b66