Nico Huber b4953a93aa cpu/x86/mtrr: Get rid of CACHE_ROM_SIZE_OVERRIDE ... As far as I can see this Kconfig option was used wrong ever since it was added. According to the commit message of 107f72e (Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR), it was only necessary to prevent overlapping with CAR. Let's handle the potential overlap in C macros instead and get rid of that option. Currently, it was only used by most FSP1.0 boards, and only because the `fsp1_0/Kconfig` set it to CBFS_SIZE (WTF?). Change-Id: I4d0096f14a9d343c2e646e48175fe2127198a822 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/26566 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2018-05-31 15:08:48 +00:00
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acpi
acpi_tables.c
board_info.txt
cmos.layout
devicetree.cb
dsdt.asl
fadt.c
gpio.c
irqroute.c
irqroute.h
Kconfig	cpu/x86/mtrr: Get rid of CACHE_ROM_SIZE_OVERRIDE	2018-05-31 15:08:48 +00:00
Kconfig.name
mainboard.c	mb/intel: Get rid of device_t	2018-05-08 14:18:52 +00:00
Makefile.inc
romstage.c