coreboot-kgpe-d16/src
Timothy Pearson 5a57725126 Revert "nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installed"
This reverts commit f961becc43.

On studying the BKDG more closely this is not the correct place
to enable DIMM parity.  Further patches to clarify the parity
setup process on Family 15h are forthcoming.

Change-Id: I5a3a4f1621e3048f9dfc159709410be9de6ebecd
Reviewed-on: https://review.coreboot.org/14271
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-08 17:21:21 +02:00
..
acpi acpi/: add missing license header 2016-01-14 22:52:11 +01:00
arch arch/power8: Position bootblock start at reset vector 2016-04-04 20:45:19 +02:00
commonlib arch/x86: introduce postcar stage/phase 2016-03-23 14:24:30 +01:00
console arch/x86: introduce postcar stage/phase 2016-03-23 14:24:30 +01:00
cpu src/: Fix lint style-labels warnings 2016-03-31 23:05:32 +02:00
device device: Add i2c read/write register field API 2016-03-21 23:10:55 +01:00
drivers drivers/intel/fsp2_0: Add utility to recover MRC NV Storage data 2016-04-08 00:46:12 +02:00
ec Hide EC_GOOGLE_CHROMEEC_SPI_BUS. 2016-03-05 00:57:22 +01:00
include edid: Make framebuffer row alignment configurable 2016-04-07 20:46:38 +02:00
lib edid: Make framebuffer row alignment configurable 2016-04-07 20:46:38 +02:00
mainboard mb/asus/kgpe-d16|kcma-d8: Enable early MCE reporting 2016-04-08 16:44:40 +02:00
northbridge Revert "nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installed" 2016-04-08 17:21:21 +02:00
soc rockchip: refactor to sharing code among similar SOCs 2016-04-07 21:49:20 +02:00
southbridge sb/amd/sb700: Add sb7xx_51xx_decode_last_reset() 2016-04-08 16:43:22 +02:00
superio superio/nuvoton: Use official spelling of Nuvoton in CHIP_NAME 2016-04-02 04:10:07 +02:00
vendorcode chromeos: Fix adding a bmpblk to GBB 2016-04-05 13:37:11 +02:00
Kconfig Kconfig: remove COMPRESS_PRERAM_STAGES option from x86 2016-03-11 16:52:38 +01:00