coreboot-kgpe-d16/src/northbridge
Ronald G. Minnich 5bcca7e982 haswell: pull in the init code for FUI
Removed two unnecessary register sets, and did the power well a bit
more correctly. Also, added a register definition include file so we can
used constants instead of magic numbers.

We also set registers to common initialized values that are
needed for FUI, VBIOS, and kernel. This set of registers
appears to be an absolute bare minimum. Since we're hoping to use
FUI for all chipsets from this one forward, we unconditionally do the
setting here.

Signed-off-by: Ronald G. Minnich <rminnich@google.com>

Change-Id: Ife3f661ba010214d92b646b336f2b06645119f17
Reviewed-on: https://gerrit.chromium.org/gerrit/59988
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Commit-Queue: Ronald G. Minnich <rminnich@chromium.org>
Tested-by: Ronald G. Minnich <rminnich@chromium.org>
Reviewed-on: http://review.coreboot.org/4328
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-12-05 20:23:23 +01:00
..
amd global: Fix usage of get_option() to make use of CB_CMOS_ codes 2013-12-02 22:11:20 +01:00
dmp CBMEM northbridges: Remove references to global high_tables_base 2013-09-11 07:09:47 +02:00
intel haswell: pull in the init code for FUI 2013-12-05 20:23:23 +01:00
rdc CBMEM northbridges: Remove references to global high_tables_base 2013-09-11 07:09:47 +02:00
via timestamps epia-m850: Cleanup without enabling timestamps 2013-09-21 06:21:13 +02:00
Kconfig Add support for DMP Vortex86EX PCI northbridge. 2013-06-22 17:33:27 +02:00
Makefile.inc Add support for DMP Vortex86EX PCI northbridge. 2013-06-22 17:33:27 +02:00