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Set IgdDvmt50PreAlloc to zero if InternalGfx is disabled. It's 'correct' to do it like this, otherwise the FSP would always allocate memory for the IGD even if it is disabled. In addition the FSP enables the graphics panel power even if no IGD is present which leads to a crashing FSP. Thus, if no IGD is present we switch off the panel via UPDs. Refer to this issue on IntelFSP for details: https://github.com/IntelFsp/FSP/issues/49 Tested on: * CFL platform with IGD * CFL platform without IGD Change-Id: I6f9e0f9855224614471d8ed23bf2a9786386ddca Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39454 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
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Intel Firmware Support Package (FSP)-specific documentation
This section contains documentation about Intel-FSP in public domain.
Bugs
As Intel doesn't even list known bugs, they are collected here until those are fixed. If possible a workaround is described here as well.
BroadwellDEFsp
-
IA32_FEATURE_CONTROL MSR is locked in FSP-M
- Release MR2
- Writing the MSR is required in ramstage for Intel TXT
- Workaround: none
- Issue on public tracker: Issue 10
-
FSP-S asserts if the thermal PCI device 00:1f.6 is disabled
- Release MR2
- FSP expects the PCI device to be enabled
- FSP expects BARs to be properly assigned
- Workaround: Don't disable this PCI device
- Issue on public tracker: Issue 13
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FSP Notify(EnumInitPhaseAfterPciEnumeration) hangs if 00:02.03/00:02.03 are hidden
- Release MR2
- Seems to get stuck on some SKUs only if hidden after MemoryInit
- Workaround: Hide before MemoryInit
- Issue on public tracker: Issue 35
KabylakeFsp
-
MfgId and ModulePartNum in the DIMM_INFO struct are empty
- Release 3.7.1
- Those values are typically consumed by SMBIOS type 17
- Workaround: none
- Issue on public tracker: Issue 22
-
MRC forces memory re-training on cold boot on boards with Intel SPS
- Releases 3.7.1, 3.7.6
- Workaround: Flash Intel ME instead of SPS
- Issue on public tracker: Issue 41
BraswellFsp
- Internal UART can't be disabled using PcdEnableHsuart*
- Release MR2
- Workaround: Disable internal UART manually after calling FSP
- Issue on public tracker: Issue 10
CoffeeLakeFsp
- Disabling the internal graphics causes a crash in FSP-M
- 7.0.68.40 and older version
- Workaround: Set "tconfig->PanelPowerEnable = 0"
- Issue on public tracker: Issue 49