Jonathan Neuschäfer 5d2c0ef740 spike-riscv: Remove HTIF related code ... The HTIF is deprecated and the newest RISC-V binutils don't know the mtohost/mfromhost CSRs anymore. The SBI implementation still needs to be restructured. Change-Id: I13f01e45b714f1bd919e27b84aff8db772504b1f Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/15289 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)		2016-07-12 21:45:32 +02:00
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board_info.txt	Add board URLs for the RISC-V boards	2016-04-28 19:19:27 +02:00
bootblock.c	tree: drop last paragraph of GPL copyright header	2015-10-31 21:37:39 +01:00
devicetree.cb
Kconfig	Define RAMTOP for x86 only	2016-06-17 00:17:53 +02:00
Kconfig.name
mainboard.c
Makefile.inc
memlayout.ld	riscv-spike: Move coreboot to 0x80000000 (2GiB)	2016-06-21 00:11:49 +02:00
romstage.c
spike_util.c	spike-riscv: Remove HTIF related code	2016-07-12 21:45:32 +02:00
uart.c	riscv-spike: Replace custom UART with a memory-mapped 8250	2016-06-12 12:43:37 +02:00