coreboot-kgpe-d16/src/soc
Aaron Durbin 5f66b52464 tegra132: add support for TZ carve-out
The TrustZone carve-out needs to be taken into account when
determining the memory layout. However, things are complicated
by the fact that TZ carve-out registers are not accessible by
the AVP.

BUG=chrome-os-partner:30572
BRANCH=None
TEST=Built and booted to end of ramstage. Noted that denver cores
     can read TZ registers while AVP doesn't bother.

Original-Change-Id: I2d2d27e33a334bf639af52260b99d8363906c646
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/207835
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
(cherry picked from commit a4d792f4ed6a0c39eab09d90f4454d3d5dc3db26)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I8fbef03d5ac42d300e1e41aeba9b86c929e01494
Reviewed-on: http://review.coreboot.org/8593
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
2015-03-05 17:32:19 +01:00
..
intel fsp_baytrail: Add I2C driver 2015-03-05 14:19:34 +01:00
nvidia tegra132: add support for TZ carve-out 2015-03-05 17:32:19 +01:00
qualcomm include/types.h: Provide BIT() macro 2015-02-06 19:25:57 +01:00
samsung CBMEM: Always use DYNAMIC_CBMEM 2015-01-27 22:54:32 +01:00
ucb CBMEM: Always use DYNAMIC_CBMEM 2015-01-27 22:54:32 +01:00
Kconfig Add UCB RISCV support for architecture, soc, and emulation mainboard.. 2014-12-01 19:06:43 +01:00
Makefile.inc Add UCB RISCV support for architecture, soc, and emulation mainboard.. 2014-12-01 19:06:43 +01:00