Eric Biederman 60216355d2 - With Xeon cpus it seems best to use the tsc calibrated with timer2 as ... the time source. The apic timer also has a variable time base. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2004-10-23 02:47:13 +00:00
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s2735	- With Xeon cpus it seems best to use the tsc calibrated with timer2 as	2004-10-23 02:47:13 +00:00
s2850	add Option.lb	2004-10-20 17:54:01 +00:00
s2875	add Option.lb	2004-10-20 17:54:01 +00:00
s2880	add Option.lb	2004-10-20 17:54:01 +00:00
s2881	add Option.lb	2004-10-20 17:54:01 +00:00
s2882	add Option.lb	2004-10-20 17:54:01 +00:00
s2885	add Option.lb	2004-10-20 17:54:01 +00:00
s4880	s2735 half update	2004-10-22 18:45:36 +00:00
s4882	s2735 half update	2004-10-22 18:45:36 +00:00