coreboot-kgpe-d16/payloads/libpayload/arch
Nico Huber bc2c12c728 libpayload/x86: Try to discover invariant TSC rate
We can skip the PIT-based TSC calibration if we can derive the invariant
TSC rate from CPUID/MSR data. This is necessary if the PIT is disabled,
which is the default, for instance, on Coffee Lake CPUs.

This implementation should cover all Intel Core i processors at least.
For older processors, we fall back to the PIT calibration.

Change-Id: Ic6607ee2a8b41c2be9dc1bb4f1e23e652bb33889
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34170
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2020-11-02 06:24:33 +00:00
..
arm
arm64 payloads: Drop unneeded empty lines 2020-09-21 16:20:57 +00:00
x86 libpayload/x86: Try to discover invariant TSC rate 2020-11-02 06:24:33 +00:00