Maulik V Vaghela 6225a67740 mb/google/hatch: Enable PCIe WLAN and BT ... Enable PCIe WLAN for hatch 1. Enable PCI port 14 for PCIe WLAN 2. Enable CLKREQ, CLK SRC 3 for PCI port 14 3. GPIO pad config for WLAN and BT USB port for BT has already been enabled so not included in this patch BUG=b:120914069 BRANCH=none TEST=check if code compiles correctly and verify GPIO configuration with schematics Change-Id: I4f2a6eb37a467ad8b8cdde8fe6b657fabb383b04 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/30467 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>		2019-01-24 13:52:15 +00:00
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spd	mb/google/hatch: Add memory init setup for hatch	2018-12-23 05:12:14 +00:00
variants	mb/google/hatch: Enable PCIe WLAN and BT	2019-01-24 13:52:15 +00:00
acpi_tables.c
board_info.txt	mb/google/hatch: Creating skeleton directories and files	2018-12-13 00:46:09 +00:00
bootblock.c	mb/google/hatch: Creating skeleton directories and files	2018-12-13 00:46:09 +00:00
chromeos.c	mb/google/hatch: Fixes to initial hatch mainboard checkin	2018-12-22 12:14:20 +00:00
chromeos.fmd	mb/google/hatch: Make WP_RO range align with winbond specification	2019-01-03 04:31:35 +00:00
dsdt.asl	mb/google/hatch: Add SoC and EC asl files in DSDT	2018-12-25 03:42:23 +00:00
Kconfig	mb/google/hatch: Remove MAINBOARD_USES_IFD_EC_REGION selection	2019-01-22 06:29:31 +00:00
Kconfig.name	mb/google/hatch: Creating skeleton directories and files	2018-12-13 00:46:09 +00:00
mainboard.c	hatch: Add sbmios_mainboard_sku function	2019-01-17 07:28:27 +00:00
Makefile.inc	mb/google/hatch: Add memory init setup for hatch	2018-12-23 05:12:14 +00:00
ramstage.c	mb/google/hatch: Clean up gpio definitions in hatch variant	2018-12-21 04:40:28 +00:00
romstage.c	mb/google/hatch: Add memory init setup for hatch	2018-12-23 05:12:14 +00:00
smihandler.c	mb/google/hatch: Add SMI handlers	2018-12-27 22:08:57 +00:00