coreboot-kgpe-d16/src/soc
Nico Huber 6278867065 soc/intel/common/smbus: Don't clear random bits
FSP might have done some settings for us there. Use pci_update_config32()
since the register is documented to be 32 bits wide.

Change-Id: I995e8a731a6958f10600174d031bb94f5a0a66db
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/21072
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-08-21 14:20:25 +00:00
..
amd stoneyridge: Fix CPU ASL \_PR table 2017-08-14 19:36:50 +00:00
broadcom/cygnus include/device: Split i2c.h into three 2017-08-18 15:33:29 +00:00
dmp/vortex86ex soc/dmp/vortex86: Fix CMOS read and random RTC reset 2017-08-01 13:20:15 +00:00
imgtec/pistachio Consolidate reset API, add generic reset_prepare mechanism 2017-06-13 20:53:09 +02:00
intel soc/intel/common/smbus: Don't clear random bits 2017-08-21 14:20:25 +00:00
lowrisc/lowrisc
marvell/mvmap2315 Update files with no newline at the end 2017-07-24 15:08:16 +00:00
mediatek/mt8173 include/device: Split i2c.h into three 2017-08-18 15:33:29 +00:00
nvidia include/device: Split i2c.h into three 2017-08-18 15:33:29 +00:00
qualcomm include/device: Split i2c.h into three 2017-08-18 15:33:29 +00:00
rockchip include/device: Split i2c.h into three 2017-08-18 15:33:29 +00:00
samsung include/device: Split i2c.h into three 2017-08-18 15:33:29 +00:00
ucb/riscv