coreboot-kgpe-d16/src/soc/amd
Marc Jones 6bfcf666b0 stoneyridge: Fix CPU ASL \_PR table
The PMIO region was moved, but not updated in the ASL. Change to
generate \_PR table runtime and to report the correct PMIO region
and length.

Fix on Kahlee, where the EC overlaps the region:
[    0.802721] cros_ec_lpcs GOOG0004:00: couldn't reserve region0
[    0.807446] cros_ec_lpcs: probe of GOOG0004:00 failed with error -16

BUG=b:63902389
BRANCH=none
TEST=Cros_ec_lps can reserve the region. ACPI tables are correct.

Change-Id: I870f810cc5d2edc0b842478cde5b3c164ed3b47f
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/20910
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-08-14 19:36:50 +00:00
..
common stoneyridge: Rename hudson to southbridge 2017-08-14 14:50:51 +00:00
stoneyridge stoneyridge: Fix CPU ASL \_PR table 2017-08-14 19:36:50 +00:00