Martin Roth dcf86e0cff mb/[google/intel]/*: Specify Chrome EC bus - LPC or ESPI ... Previously all boards using eSPI for the Chrome EC just called it LPC as the code for the chrome EC is the same between the two busses. I'm adding a new Kconfig symbol to specify eSPI, so switch the boards that actually use eSPI to that symbol and add the LPC symbol to all the others. The EC_GOOGLE_CHROMEEC_LPC symbol will no longer default to enabled for x86 platforms, so one symbol or the other needs to be specified for each platform. BUG=b:140055300 TEST=Build tested only. Change-Id: Icf242ca2b7d8b1470feda4e44b47a2cdc20680f2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35153 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2019-10-03 15:29:53 +00:00
..
acpi
spd	src/mainboard: Remove unused include <arch/byteorder.h>	2019-06-19 12:29:18 +00:00
acpi_tables.c
board_info.txt	google/eve: Add new board	2016-11-01 22:54:25 +01:00
bootblock.c
chromeos.c	mb/*/chromeos.c: Remove some ENV_RAMSTAGE and __SIMPLE_DEVICE__	2019-07-25 16:03:37 +00:00
chromeos.fmd	mainboard: Enable PRESERVE flag in all vboot/chromeos FMD files	2019-03-05 20:52:06 +00:00
data.vbt
devicetree.cb	mb/google: Add GPU panel settings for SKL/KBL boards	2019-06-06 20:05:03 +00:00
dsdt.asl	cpu/intel/common: Use a common acpi/cpu.asl file	2018-11-30 22:02:35 +00:00
ec.c
ec.h	mb/google/eve: Enable wake from MKBP events in S3	2019-07-21 18:45:02 +00:00
gpio.h
Kconfig	mb/[google/intel]/*: Specify Chrome EC bus - LPC or ESPI	2019-10-03 15:29:53 +00:00
Kconfig.name
mainboard.c
Makefile.inc	arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class	2019-07-09 12:43:35 +00:00
ramstage.c
romstage.c	mb/google/{eve,glados}: Copy channel arrays separately	2019-08-20 15:17:08 +00:00
smihandler.c	mainboard/google: Fix indirect includes	2019-08-15 04:41:35 +00:00