coreboot-kgpe-d16/src/mainboard/intel/shadowmountain/Makefile.inc
V Sowmya ae930d85c2 mb/intel/shadowmountain: Add the ramstage code
This patch includes the ramstage changes for the
shadowmountain board.

BUG=b:175808146
TEST= Build and boot shadowmountain board.

Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I419eecefddf9ee6e4249ada041ebeb1b78e85eb7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49732
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-27 09:40:47 +00:00

20 lines
466 B
Makefile

## SPDX-License-Identifier: GPL-2.0-only
bootblock-y += bootblock.c
bootblock-$(CONFIG_CHROMEOS) += chromeos.c
verstage-$(CONFIG_CHROMEOS) += chromeos.c
romstage-$(CONFIG_CHROMEOS) += chromeos.c
romstage-y += romstage.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-y += ec.c
ramstage-y += mainboard.c
smm-y += smihandler.c
subdirs-y += spd
subdirs-y += variants/baseboard
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include