coreboot-kgpe-d16/src/southbridge/amd
Kyösti Mälkki 657d68bddc AGESA,binaryPI: Move PORT80 selection to C bootblock
Because the function is implemented in C, post_code() calls
from cache_as_ram.S and other early assembly entry files may
not currently work for cold boots. Assembly implementation
needs to follow one day.

This effectively removes PORT80 routing from boards with
ROMCC_BOOTBLOCK.

Change-Id: I71aa94b33bd6f65e243724810472a440e98e0750
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37451
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
2019-12-09 05:23:55 +00:00
..
agesa AGESA,binaryPI: Move PORT80 selection to C bootblock 2019-12-09 05:23:55 +00:00
cimx sb/amd/cimx/sb800: add C bootblock southbridge initialization 2019-12-04 16:41:49 +00:00
common AGESA,binaryPI: Replace use of __PRE_RAM__ 2019-08-20 12:47:44 +00:00
pi AGESA,binaryPI: Move PORT80 selection to C bootblock 2019-12-09 05:23:55 +00:00