3ff14a0c85
Change-Id: I3e76726bb77f0277ab5776ae9d3d42b7eb389fe3 Signed-off-by: Hannah Williams <hannah.williams@intel.com> Reviewed-on: https://review.coreboot.org/19603 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
119 lines
3.1 KiB
Text
119 lines
3.1 KiB
Text
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2016 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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Scope (\_SB)
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{
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/* Get Pad Configuration DW0 register value */
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Method (GPC0, 0x1, Serialized)
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{
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/* Arg0 - GPIO DW0 address */
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Store (Arg0, Local0)
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OperationRegion (PDW0, SystemMemory, Local0, 4)
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Field (PDW0, AnyAcc, NoLock, Preserve) {
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TEMP, 32
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}
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Return (TEMP)
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}
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/* Set Pad Configuration DW0 register value */
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Method (SPC0, 0x2, Serialized)
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{
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/* Arg0 - GPIO DW0 address */
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/* Arg1 - Value for DW0 register */
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Store (Arg0, Local0)
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OperationRegion (PDW0, SystemMemory, Local0, 4)
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Field (PDW0, AnyAcc, NoLock, Preserve) {
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TEMP,32
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}
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Store (Arg1, TEMP)
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}
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/* Get Pad Configuration DW1 register value */
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Method (GPC1, 0x1, Serialized)
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{
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/* Arg0 - GPIO DW0 address */
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Store (Add (Arg0, 0x4), Local0)
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OperationRegion (PDW1, SystemMemory, Local0, 4)
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Field (PDW1, AnyAcc, NoLock, Preserve) {
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TEMP, 32
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}
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Return (TEMP)
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}
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/* Set Pad Configuration DW1 register value */
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Method (SPC1, 0x2, Serialized)
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{
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/* Arg0 - GPIO DW0 address */
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/* Arg1 - Value for DW1 register */
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Store (Add (Arg0, 0x4), Local0)
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OperationRegion (PDW1, SystemMemory, Local0, 4)
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Field(PDW1, AnyAcc, NoLock, Preserve) {
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TEMP,32
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}
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Store (Arg1, TEMP)
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}
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/* Get DW0 address of a given pad */
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Method (GDW0, 0x2, Serialized)
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{
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/* Arg0 - GPIO portid */
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/* Arg1 - GPIO pad offset relative to the community */
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Store (0, Local1)
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Or( Or (ShiftLeft (Arg0, 16), CONFIG_PCR_BASE_ADDRESS),
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Local1, Local1)
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Or( Add (PAD_CFG_BASE, Multiply (Arg1, Multiply (
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GPIO_NUM_PAD_CFG_REGS, 4))), Local1, Local1)
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Return (Local1)
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}
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/* Calculate HOSTSW_REG address */
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Method (CHSA, 0x1, Serialized)
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{
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/* Arg0 - GPIO pad offset relative to the community */
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Add (HOSTSW_OWN_REG_0, Multiply (Divide (Arg0, 32), 4), Local1)
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Return (Local1)
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}
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/* Get Host ownership register of GPIO Community */
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Method (GHO, 0x2, Serialized)
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{
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/* Arg0 - GPIO portid */
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/* Arg1 - GPIO pad offset relative to the community */
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Store (CHSA (Arg1), Local1)
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OperationRegion (SHO0, SystemMemory, Or ( Or
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(CONFIG_PCR_BASE_ADDRESS, ShiftLeft (Arg0, 16)), Local1), 4)
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Field (SHO0, AnyAcc, NoLock, Preserve) {
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TEMP, 32
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}
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Return (TEMP)
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}
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/* Set Host ownership register of GPIO Community */
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Method (SHO, 0x3, Serialized)
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{
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/* Arg0 - GPIO portid */
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/* Arg1 - GPIO pad offset relative to the community */
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/* Arg2 - Value for Host own register */
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Store (CHSA (Arg1), Local1)
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OperationRegion (SHO0, SystemMemory, Or ( Or
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(CONFIG_PCR_BASE_ADDRESS, ShiftLeft (Arg0, 16)), Local1), 4)
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Field (SHO0, AnyAcc, NoLock, Preserve) {
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TEMP, 32
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}
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Store (Arg2, TEMP)
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}
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}
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