coreboot-kgpe-d16/src/soc/intel/apollolake/acpi
Nico Huber 44c6cf67c3 soc/intel/apl/acpi: Do not report 8259 PICs
The IRQ tables don't support this path, so we shouldn't report presence
of the legacy PICs. As the _PIC method is optional and we ignore the
passed parameter anyway, drop it.

Change-Id: I51301a600e16f74fde00fdcb4595e1f47a52e207
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29833
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Lance Zhao <lance.zhao@gmail.com>
2019-04-26 16:58:47 +00:00
..
dptf.asl soc/intel/common/dptf: Make CPU address a define 2018-12-04 10:19:04 +00:00
globalnvs.asl
gpio.asl
gpiolib.asl
lpc.asl
lpss.asl
northbridge.asl
pch_hda.asl
pci_irqs.asl coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) 2019-03-08 08:33:24 +00:00
pcie.asl soc/intel/apollolake: Configure PCIe root port #3 for GLK WiFi 2018-04-17 10:42:46 +00:00
pcie_port.asl soc/intel/apollolake: Implement _PS0/_PS3 methods for PCIe root ports 2018-04-17 10:44:47 +00:00
platform.asl soc/intel/apl/acpi: Do not report 8259 PICs 2019-04-26 16:58:47 +00:00
pmc_ipc.asl
scs.asl soc/intel/apollolake: add _RMV attributes to eMMC device ACPI 2017-12-14 22:16:13 +00:00
sleepstates.asl
soc_int.asl
southbridge.asl coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) 2019-03-08 08:33:24 +00:00
xhci.asl coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) 2019-03-08 08:33:24 +00:00
xhci_apl_ports.asl soc/intel/apollolake: Update XHCI ports for GLK in ACPI tables 2019-02-05 06:31:41 +00:00
xhci_glk_ports.asl soc/intel/apollolake: Update XHCI ports for GLK in ACPI tables 2019-02-05 06:31:41 +00:00